diff options
| author | Peter Tyser <ptyser@xes-inc.com> | 2010-10-28 15:24:59 -0500 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2010-11-14 23:45:57 +0100 |
| commit | a72dbae2ccd38d2b32f8b814f5a528c88be65bd3 (patch) | |
| tree | 59d540d16474f386d3600fc5d0f9fdceff21c7da | |
| parent | 258ccd68170b7279ec7d4805c7b914c90374e711 (diff) | |
| download | olio-uboot-2014.01-a72dbae2ccd38d2b32f8b814f5a528c88be65bd3.tar.xz olio-uboot-2014.01-a72dbae2ccd38d2b32f8b814f5a528c88be65bd3.zip | |
fsl_pci_init: Make fsl_pci_init_port() PCI/PCIe aware
Previously fsl_pci_init_port() always assumed that a port was a PCIe
port and would incorrectly print messages for a PCI port such as the
following on bootup:
PCI1: 32 bit, 33 MHz, sync, host, arbiter
Scanning PCI bus 00
PCIE1 on bus 00 - 00
This change corrects the output of fsl_pci_init_port():
PCI1: 32 bit, 33 MHz, sync, host, arbiter
Scanning PCI bus 00
PCI1 on bus 00 - 00
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
| -rw-r--r-- | drivers/pci/fsl_pci_init.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c index 1f021036e..45794dabe 100644 --- a/drivers/pci/fsl_pci_init.c +++ b/drivers/pci/fsl_pci_init.c @@ -441,6 +441,8 @@ int fsl_pci_init_port(struct fsl_pci_info *pci_info, { volatile ccsr_fsl_pci_t *pci; struct pci_region *r; + pci_dev_t dev = PCI_BDF(busno,0,0); + u8 pcie_cap; pci = (ccsr_fsl_pci_t *) pci_info->regs; @@ -479,7 +481,9 @@ int fsl_pci_init_port(struct fsl_pci_info *pci_info, hose->last_busno = hose->first_busno; } - printf(" PCIE%x on bus %02x - %02x\n", pci_info->pci_num, + pci_hose_read_config_byte(hose, dev, FSL_PCIE_CAP_ID, &pcie_cap); + printf(" PCI%s%x on bus %02x - %02x\n", pcie_cap == PCI_CAP_ID_EXP ? + "E" : "", pci_info->pci_num, hose->first_busno, hose->last_busno); return(hose->last_busno + 1); |