diff options
| author | TsiChungLiew <Tsi-Chung.Liew@freescale.com> | 2007-10-25 17:09:17 -0500 |
|---|---|---|
| committer | TsiChungLiew <Tsi-Chung.Liew@freescale.com> | 2007-10-25 17:09:17 -0500 |
| commit | 2acefa72ee0026f862ab65597ca687428f63a973 (patch) | |
| tree | 990725e4026e4bf3e3cfad72ee6a023b1b94e267 | |
| parent | 5441f61a3d8b7034f19fc1361183e936198e6dbb (diff) | |
| download | olio-uboot-2014.01-2acefa72ee0026f862ab65597ca687428f63a973.tar.xz olio-uboot-2014.01-2acefa72ee0026f862ab65597ca687428f63a973.zip | |
ColdFire 5282: Fix external flash boot and return dramsize
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
| -rw-r--r-- | board/m5282evb/m5282evb.c | 1 | ||||
| -rw-r--r-- | cpu/mcf52x2/start.S | 6 | ||||
| -rw-r--r-- | include/configs/M5282EVB.h | 2 |
3 files changed, 7 insertions, 2 deletions
diff --git a/board/m5282evb/m5282evb.c b/board/m5282evb/m5282evb.c index 243d6a4d8..7d6d1d623 100644 --- a/board/m5282evb/m5282evb.c +++ b/board/m5282evb/m5282evb.c @@ -89,4 +89,5 @@ long int initdram (int board_type) /* Write to the SDRAM Mode Register */ *(u32 *)(CFG_SDRAM_BASE + 0x400) = 0xA5A59696; } + return dramsize; } diff --git a/cpu/mcf52x2/start.S b/cpu/mcf52x2/start.S index 686e2a533..260a09abf 100644 --- a/cpu/mcf52x2/start.S +++ b/cpu/mcf52x2/start.S @@ -58,7 +58,7 @@ _vectors: .long 0x00000000 /* Flash offset is 0 until we setup CS0 */ #if defined(CONFIG_R5200) .long 0x400 -#elif defined(CONFIG_M5282) +#elif defined(CONFIG_M5282) && (TEXT_BASE == CFG_INT_FLASH_BASE) .long _start - TEXT_BASE #else .long _START @@ -177,7 +177,11 @@ _after_flashbar_copy: * therefore no VBR to set */ #if !defined(CONFIG_MONITOR_IS_IN_RAM) +#if defined(CONFIG_M5282) && (TEXT_BASE == CFG_INT_FLASH_BASE) + move.l #CFG_INT_FLASH_BASE, %d0 +#else move.l #CFG_FLASH_BASE, %d0 +#endif movec %d0, %VBR #endif diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index 3c17c1ea1..7bb9f60f7 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -163,7 +163,7 @@ * Please note that CFG_SDRAM_BASE _must_ start at 0 */ #define CFG_SDRAM_BASE 0x00000000 -#define CFG_SDRAM_SIZE 8 /* SDRAM size in MB */ +#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */ #define CFG_FLASH_BASE 0xffe00000 #define CFG_INT_FLASH_BASE 0xf0000000 #define CFG_INT_FLASH_ENABLE 0x21 |