diff options
| author | Wolfgang Denk <wd@pollux.denx.de> | 2006-03-17 11:42:53 +0100 | 
|---|---|---|
| committer | Wolfgang Denk <wd@pollux.denx.de> | 2006-03-17 11:42:53 +0100 | 
| commit | 09e4b0c5d3881412519f33d498560a5bbcc82cd9 (patch) | |
| tree | 691b37e2fc2772d0c03aa5f58b2c3d93bad183f8 | |
| parent | ff7fefe6797246b2748530f965f2e41de34a982a (diff) | |
| download | olio-uboot-2014.01-09e4b0c5d3881412519f33d498560a5bbcc82cd9.tar.xz olio-uboot-2014.01-09e4b0c5d3881412519f33d498560a5bbcc82cd9.zip | |
Add support for Lite5200B board.
Patch by  Patch by Jose Maria (Txema) Lopez, 16 Jan 2006
| -rw-r--r-- | CHANGELOG | 3 | ||||
| -rwxr-xr-x | MAKEALL | 7 | ||||
| -rw-r--r-- | Makefile | 14 | ||||
| -rw-r--r-- | README | 76 | ||||
| -rw-r--r-- | board/icecube/flash.c | 2 | ||||
| -rw-r--r-- | board/icecube/icecube.c | 13 | ||||
| -rw-r--r-- | board/icecube/mt46v32m16.h | 37 | ||||
| -rw-r--r-- | board/mpc8349ads/pci.c | 12 | ||||
| -rw-r--r-- | fs/jffs2/jffs2_private.h | 4 | ||||
| -rw-r--r-- | include/configs/IceCube.h | 49 | ||||
| -rw-r--r-- | include/configs/RPXlite_DW.h | 58 | 
11 files changed, 192 insertions, 83 deletions
| @@ -2,6 +2,9 @@  Changes since U-Boot 1.1.4:  ====================================================================== +* Add support for Lite5200B board. +  Patch by  Patch by Jose Maria (Txema) Lopez, 16 Jan 2006 +  * Apply SoC concept to arm926ejs CPUs, i.e. move the SoC specific    timer and cpu_reset code from cpu/$(CPU) into the new    cpu/$(CPU)/$(SOC) directories @@ -25,9 +25,10 @@ LIST_5xx="	\  #########################################################################  LIST_5xxx="	\ -	cpci5200	icecube_5100	icecube_5200	EVAL5200	\ -	mcc200		o2dnt		pf5200		PM520		\ -	Total5100	Total5200	Total5200_Rev2	TQM5200_auto	\ +	cpci5200	EVAL5200	icecube_5100	icecube_5200	\ +	lite5200b	mcc200		o2dnt		pf5200		\ +	PM520		Total5100	Total5200	Total5200_Rev2	\ +	TQM5200_auto							\  "  ######################################################################### @@ -303,6 +303,20 @@ icecube_5100_config:			unconfig  inka4x0_config:	unconfig  	@./mkconfig inka4x0 ppc mpc5xxx inka4x0 +lite5200b_config	\ +lite5200b_LOWBOOT_config:	unconfig +	@ >include/config.h +	@ echo "#define CONFIG_MPC5200_DDR"	>>include/config.h +	@ echo "... DDR memory revision" +	@ echo "#define CONFIG_MPC5200"		>>include/config.h +	@ echo "#define CONFIG_LITE5200B"	>>include/config.h +	@[ -z "$(findstring LOWBOOT_,$@)" ] || \ +		{ echo "TEXT_BASE = 0xFF000000" >board/icecube/config.tmp ; \ +		  echo "... with LOWBOOT configuration" ; \ +		} +	@ echo "... with MPC5200B processor" +	@./mkconfig -a IceCube  ppc mpc5xxx icecube +  mcc200_config	\  mcc200_lowboot_config:	unconfig  	@ >include/config.h @@ -261,44 +261,44 @@ The following options need to be configured:  		PowerPC based boards:  		--------------------- -		CONFIG_ADCIOP		CONFIG_GEN860T		CONFIG_PCIPPC2 -		CONFIG_ADS860		CONFIG_GENIETV		CONFIG_PCIPPC6 -		CONFIG_AMX860		CONFIG_GTH		CONFIG_pcu_e -		CONFIG_AP1000		CONFIG_gw8260		CONFIG_PIP405 -		CONFIG_AR405		CONFIG_hermes		CONFIG_PM826 -		CONFIG_BAB7xx		CONFIG_hymod		CONFIG_ppmc8260 -		CONFIG_c2mon		CONFIG_IAD210		CONFIG_QS823 -		CONFIG_CANBT		CONFIG_ICU862		CONFIG_QS850 -		CONFIG_CCM		CONFIG_IP860		CONFIG_QS860T -		CONFIG_CMI		CONFIG_IPHASE4539	CONFIG_RBC823 -		CONFIG_cogent_mpc8260	CONFIG_IVML24		CONFIG_RPXClassic -		CONFIG_cogent_mpc8xx	CONFIG_IVML24_128	CONFIG_RPXlite -		CONFIG_CPCI405		CONFIG_IVML24_256	CONFIG_RPXsuper -		CONFIG_CPCI4052		CONFIG_IVMS8		CONFIG_rsdproto -		CONFIG_CPCIISER4	CONFIG_IVMS8_128	CONFIG_sacsng -		CONFIG_CPU86		CONFIG_IVMS8_256	CONFIG_Sandpoint8240 -		CONFIG_CRAYL1		CONFIG_JSE		CONFIG_Sandpoint8245 -		CONFIG_CSB272		CONFIG_LANTEC		CONFIG_sbc8260 -		CONFIG_CU824		CONFIG_lwmon		CONFIG_sbc8560 -		CONFIG_DASA_SIM		CONFIG_MBX		CONFIG_SM850 -		CONFIG_DB64360		CONFIG_MBX860T		CONFIG_SPD823TS -		CONFIG_DB64460		CONFIG_MHPC		CONFIG_STXGP3 -		CONFIG_DU405		CONFIG_MIP405		CONFIG_SXNI855T -		CONFIG_DUET_ADS		CONFIG_MOUSSE		CONFIG_TQM823L -		CONFIG_EBONY		CONFIG_MPC8260ADS	CONFIG_TQM8260 -		CONFIG_ELPPC		CONFIG_MPC8540ADS	CONFIG_TQM850L -		CONFIG_ELPT860		CONFIG_MPC8540EVAL	CONFIG_TQM855L -		CONFIG_ep8260		CONFIG_MPC8560ADS	CONFIG_TQM860L -		CONFIG_ERIC		CONFIG_MUSENKI		CONFIG_TTTech -		CONFIG_ESTEEM192E	CONFIG_MVS1		CONFIG_UTX8245 -		CONFIG_ETX094		CONFIG_NETPHONE		CONFIG_V37 -		CONFIG_EVB64260		CONFIG_NETTA		CONFIG_W7OLMC -		CONFIG_FADS823		CONFIG_NETVIA		CONFIG_W7OLMG -		CONFIG_FADS850SAR	CONFIG_NX823		CONFIG_WALNUT -		CONFIG_FADS860T		CONFIG_OCRTC		CONFIG_ZPC1900 -		CONFIG_FLAGADM		CONFIG_ORSG		CONFIG_ZUMA -		CONFIG_FPS850L		CONFIG_OXC -		CONFIG_FPS860L		CONFIG_PCI405 +		CONFIG_ADCIOP		CONFIG_GEN860T		CONFIG_PCI405 +		CONFIG_ADS860		CONFIG_GENIETV		CONFIG_PCIPPC2 +		CONFIG_AMX860		CONFIG_GTH		CONFIG_PCIPPC6 +		CONFIG_AP1000		CONFIG_gw8260		CONFIG_pcu_e +		CONFIG_AR405		CONFIG_hermes		CONFIG_PIP405 +		CONFIG_BAB7xx		CONFIG_hymod		CONFIG_PM826 +		CONFIG_c2mon		CONFIG_IAD210		CONFIG_ppmc8260 +		CONFIG_CANBT		CONFIG_ICU862		CONFIG_QS823 +		CONFIG_CCM		CONFIG_IP860		CONFIG_QS850 +		CONFIG_CMI		CONFIG_IPHASE4539	CONFIG_QS860T +		CONFIG_cogent_mpc8260	CONFIG_IVML24		CONFIG_RBC823 +		CONFIG_cogent_mpc8xx	CONFIG_IVML24_128	CONFIG_RPXClassic +		CONFIG_CPCI405		CONFIG_IVML24_256	CONFIG_RPXlite +		CONFIG_CPCI4052		CONFIG_IVMS8		CONFIG_RPXsuper +		CONFIG_CPCIISER4	CONFIG_IVMS8_128	CONFIG_rsdproto +		CONFIG_CPU86		CONFIG_IVMS8_256	CONFIG_sacsng +		CONFIG_CRAYL1		CONFIG_JSE		CONFIG_Sandpoint8240 +		CONFIG_CSB272		CONFIG_LANTEC		CONFIG_Sandpoint8245 +		CONFIG_CU824		CONFIG_LITE5200B	CONFIG_sbc8260 +		CONFIG_DASA_SIM		CONFIG_lwmon		CONFIG_sbc8560 +		CONFIG_DB64360		CONFIG_MBX		CONFIG_SM850 +		CONFIG_DB64460		CONFIG_MBX860T		CONFIG_SPD823TS +		CONFIG_DU405		CONFIG_MHPC		CONFIG_STXGP3 +		CONFIG_DUET_ADS		CONFIG_MIP405		CONFIG_SXNI855T +		CONFIG_EBONY		CONFIG_MOUSSE		CONFIG_TQM823L +		CONFIG_ELPPC		CONFIG_MPC8260ADS	CONFIG_TQM8260 +		CONFIG_ELPT860		CONFIG_MPC8540ADS	CONFIG_TQM850L +		CONFIG_ep8260		CONFIG_MPC8540EVAL	CONFIG_TQM855L +		CONFIG_ERIC		CONFIG_MPC8560ADS	CONFIG_TQM860L +		CONFIG_ESTEEM192E	CONFIG_MUSENKI		CONFIG_TTTech +		CONFIG_ETX094		CONFIG_MVS1		CONFIG_UTX8245 +		CONFIG_EVB64260		CONFIG_NETPHONE		CONFIG_V37 +		CONFIG_FADS823		CONFIG_NETTA		CONFIG_W7OLMC +		CONFIG_FADS850SAR	CONFIG_NETVIA		CONFIG_W7OLMG +		CONFIG_FADS860T		CONFIG_NX823		CONFIG_WALNUT +		CONFIG_FLAGADM		CONFIG_OCRTC		CONFIG_ZPC1900 +		CONFIG_FPS850L		CONFIG_ORSG		CONFIG_ZUMA +		CONFIG_FPS860L		CONFIG_OXC  		ARM based boards:  		----------------- diff --git a/board/icecube/flash.c b/board/icecube/flash.c index 713011c97..15e86d34f 100644 --- a/board/icecube/flash.c +++ b/board/icecube/flash.c @@ -23,6 +23,7 @@  #include <common.h> +#ifndef CFG_FLASH_CFI_DRIVER  flash_info_t	flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips	*/  /* NOTE - CONFIG_FLASH_16BIT means the CPU interface is 16-bit, it @@ -489,3 +490,4 @@ static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)  	return (res);  } +#endif /*CFG_FLASH_CFI_DRIVER*/ diff --git a/board/icecube/icecube.c b/board/icecube/icecube.c index 1f1a74ce3..44831c625 100644 --- a/board/icecube/icecube.c +++ b/board/icecube/icecube.c @@ -28,12 +28,15 @@  #include <mpc5xxx.h>  #include <pci.h> -#if defined(CONFIG_MPC5200_DDR) -#include "mt46v16m16-75.h" +#if defined(CONFIG_LITE5200B) +#include "mt46v32m16.h"  #else +# if defined(CONFIG_MPC5200_DDR) +#  include "mt46v16m16-75.h" +# else  #include "mt48lc16m16a2-75.h" +# endif  #endif -  #ifndef CFG_RAMBOOT  static void sdram_start (int hi_addr)  { @@ -236,7 +239,9 @@ long int initdram (int board_type)  int checkboard (void)  { -#if defined(CONFIG_MPC5200) +#if defined (CONFIG_LITE5200B) +	puts ("Board: Freescale Lite5200B\n"); +#elif defined(CONFIG_MPC5200)  	puts ("Board: Motorola MPC5200 (IceCube)\n");  #elif defined(CONFIG_MGT5100)  	puts ("Board: Motorola MGT5100 (IceCube)\n"); diff --git a/board/icecube/mt46v32m16.h b/board/icecube/mt46v32m16.h new file mode 100644 index 000000000..de2b48bc6 --- /dev/null +++ b/board/icecube/mt46v32m16.h @@ -0,0 +1,37 @@ +/* + * (C) Copyright 2004 + * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#define SDRAM_DDR	1		/* is DDR */ + +#if defined(CONFIG_MPC5200) +/* Settings for XLB = 132 MHz */ +#define SDRAM_MODE	0x018D0000 +#define SDRAM_EMODE	0x40090000 +#define SDRAM_CONTROL	0x704f0f00 +#define SDRAM_CONFIG1	0x73722930 +#define SDRAM_CONFIG2	0x47770000 +#define SDRAM_TAPDELAY	0x10000000 + +#else +#error CONFIG_MPC5200 not defined +#endif diff --git a/board/mpc8349ads/pci.c b/board/mpc8349ads/pci.c index 6cafbaa0e..c5594248d 100644 --- a/board/mpc8349ads/pci.c +++ b/board/mpc8349ads/pci.c @@ -246,9 +246,9 @@ pci_init_board(void)  	/* System memory space */  	pci_set_region(hose->regions + 3,  		       CONFIG_PCI_SYS_MEM_BUS, -                       CONFIG_PCI_SYS_MEM_PHYS, -                       gd->ram_size, -                       PCI_REGION_MEM | PCI_REGION_MEMORY); +		       CONFIG_PCI_SYS_MEM_PHYS, +		       gd->ram_size, +		       PCI_REGION_MEM | PCI_REGION_MEMORY);  	hose->region_count = 4; @@ -342,9 +342,9 @@ pci_init_board(void)  	/* System memory space */  	pci_set_region(hose->regions + 3,  		       CONFIG_PCI_SYS_MEM_BUS, -                       CONFIG_PCI_SYS_MEM_PHYS, -                       gd->ram_size, -                       PCI_REGION_MEM | PCI_REGION_MEMORY); +		       CONFIG_PCI_SYS_MEM_PHYS, +		       gd->ram_size, +		       PCI_REGION_MEM | PCI_REGION_MEMORY);  	hose->region_count = 4; diff --git a/fs/jffs2/jffs2_private.h b/fs/jffs2/jffs2_private.h index 3e1fff473..46ed644e4 100644 --- a/fs/jffs2/jffs2_private.h +++ b/fs/jffs2/jffs2_private.h @@ -89,8 +89,8 @@ static inline int  data_crc(struct jffs2_raw_inode *node)  {  	if (node->data_crc != crc32_no_comp(0, (unsigned char *) -                                            ((int) &node->node_crc + sizeof (node->node_crc)), -                                             node->csize)) { +					    ((int) &node->node_crc + sizeof (node->node_crc)), +					     node->csize)) {  		return 0;  	} else {  		return 1; diff --git a/include/configs/IceCube.h b/include/configs/IceCube.h index afba5c625..596e52ce3 100644 --- a/include/configs/IceCube.h +++ b/include/configs/IceCube.h @@ -122,9 +122,13 @@  #   define CFG_LOWBOOT16	1  #endif  #if (TEXT_BASE == 0xFF800000)		/* Boot low with  8 MB Flash */ +#if defined(CONFIG_LITE5200B) +#   error CFG_LOWBOOT08 is incompatible with the Lite5200B +#else  #   define CFG_LOWBOOT	        1  #   define CFG_LOWBOOT08	1  #endif +#endif  /*   * Autobooting @@ -160,8 +164,12 @@  /*   * IPB Bus clocking configuration.   */ -#undef CFG_IPBSPEED_133   		/* define for 133MHz speed */ +#if defined(CONFIG_LITE5200B) +#define CFG_IPBSPEED_133 	/* define for 133MHz speed */ +#else +#undef CFG_IPBSPEED_133   	/* define for 133MHz speed */  #endif +#endif /* CONFIG_MPC5200 */  /*   * I2C configuration   */ @@ -182,6 +190,20 @@  /*   * Flash configuration   */ +#if defined(CONFIG_LITE5200B) +#define CFG_FLASH_BASE		0xFE000000 +#define CFG_FLASH_SIZE		0x01000000 +#if !defined(CFG_LOWBOOT) +#define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x01760000 + 0x00800000) +#else	/* CFG_LOWBOOT */ +#if defined(CFG_LOWBOOT08) +# error CFG_LOWBOOT08 is incompatible with the Lite5200B +#endif +#if defined(CFG_LOWBOOT16) +#define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x01060000) +#endif +#endif /* CFG_LOWBOOT */ +#else /* !CONFIG_LITE5200B (IceCube)*/  #define CFG_FLASH_BASE		0xFF000000  #define CFG_FLASH_SIZE		0x01000000  #if !defined(CFG_LOWBOOT) @@ -194,6 +216,7 @@  #define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x00040000)  #endif  #endif	/* CFG_LOWBOOT */ +#endif /* CONFIG_LITE5200B */  #define CFG_MAX_FLASH_BANKS	2	/* max num of memory banks      */  #define CFG_MAX_FLASH_SECT	128	/* max num of sects on one chip */ @@ -203,13 +226,23 @@  #undef CONFIG_FLASH_16BIT	/* Flash is 8-bit */ +#if defined(CONFIG_LITE5200B) +#define CFG_FLASH_CFI_DRIVER +#define CFG_FLASH_CFI +#define CFG_FLASH_BANKS_LIST	{CFG_CS1_START,CFG_CS0_START} +#endif +  /*   * Environment settings   */  #define CFG_ENV_IS_IN_FLASH	1  #define CFG_ENV_SIZE		0x10000 +#if defined(CONFIG_LITE5200B) +#define CFG_ENV_SECT_SIZE	0x20000 +#else  #define CFG_ENV_SECT_SIZE	0x10000 +#endif  #define CONFIG_ENV_OVERWRITE	1  /* @@ -246,6 +279,9 @@   */  /* #define CONFIG_FEC_10MBIT 1 */  #define CONFIG_PHY_ADDR		0x00 +#if defined(CONFIG_LITE5200B) +#define CONFIG_FEC_MII100	1 +#endif  /*   * GPIO configuration @@ -288,6 +324,16 @@  #define CFG_HID0_FINAL		0  #endif +#if defined(CONFIG_LITE5200B) +#define CFG_CS1_START		CFG_FLASH_BASE +#define CFG_CS1_SIZE		CFG_FLASH_SIZE +#define CFG_CS1_CFG		0x00047800 +#define CFG_CS0_START		(CFG_FLASH_BASE + CFG_FLASH_SIZE) +#define CFG_CS0_SIZE		CFG_FLASH_SIZE +#define CFG_BOOTCS_START	CFG_CS0_START +#define CFG_BOOTCS_SIZE		CFG_FLASH_SIZE +#define CFG_BOOTCS_CFG		0x00047800 +#else /* IceCube aka Lite5200 */  #ifdef CONFIG_MPC5200_DDR  #define CFG_BOOTCS_START	(CFG_CS1_START + CFG_CS1_SIZE) @@ -306,6 +352,7 @@  #define CFG_CS0_SIZE		CFG_FLASH_SIZE  #endif /* CONFIG_MPC5200_DDR */ +#endif /*CONFIG_LITE5200B */  #define CFG_CS_BURST		0x00000000  #define CFG_CS_DEADCYCLE	0x33333333 diff --git a/include/configs/RPXlite_DW.h b/include/configs/RPXlite_DW.h index 5d17712f1..31025473f 100644 --- a/include/configs/RPXlite_DW.h +++ b/include/configs/RPXlite_DW.h @@ -45,7 +45,7 @@   */  /* #define DEBUG	1 */ -/* #define DEPLOYMENT 	1 */ +/* #define DEPLOYMENT	1 */  #undef	CONFIG_MPC860  #define CONFIG_MPC823		1	/* This is a MPC823e CPU. */ @@ -61,23 +61,23 @@  #define CONFIG_BAUDRATE		9600	/* console default baudrate = 9600bps	*/  #ifdef DEBUG -#define CONFIG_BOOTDELAY        -1      /* autoboot disabled            */ +#define CONFIG_BOOTDELAY	-1	/* autoboot disabled		*/  #else -#define CONFIG_BOOTDELAY        6       /* autoboot after 6 seconds     */ +#define CONFIG_BOOTDELAY	6	/* autoboot after 6 seconds	*/  #ifdef DEPLOYMENT -#define CONFIG_BOOT_RETRY_TIME          -1 +#define CONFIG_BOOT_RETRY_TIME		-1  #define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_PROMPT          "autoboot in %d seconds (stop with 'st')...\n" -#define CONFIG_AUTOBOOT_STOP_STR        "st" +#define CONFIG_AUTOBOOT_PROMPT		"autoboot in %d seconds (stop with 'st')...\n" +#define CONFIG_AUTOBOOT_STOP_STR	"st"  #define CONFIG_ZERO_BOOTDELAY_CHECK -#define CONFIG_RESET_TO_RETRY           1 -#define CONFIG_BOOT_RETRY_MIN           1 +#define CONFIG_RESET_TO_RETRY		1 +#define CONFIG_BOOT_RETRY_MIN		1  #endif	/* DEPLOYMENT */  #endif	/* DEBUG */  /* pre-boot commands */ -#define CONFIG_PREBOOT          "setenv stdout serial;setenv stdin serial" +#define CONFIG_PREBOOT		"setenv stdout serial;setenv stdin serial"  #undef	CONFIG_BOOTARGS  #define CONFIG_EXTRA_ENV_SETTINGS					\ @@ -117,35 +117,35 @@  #define CONFIG_BOOTP_MASK	(CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE) -#if 1          /* Enable this staff could make image enlarge about 25KB. Mask it if you -                  don't want the advanced function */ +#if 1	       /* Enable this stuff could make image enlarge about 25KB. Mask it if you +		  don't want the advanced function */ -#ifdef  CONFIG_SPLASH_SCREEN -#define CONFIG_COMMANDS       ( CONFIG_CMD_DFL  | \ +#ifdef	CONFIG_SPLASH_SCREEN +#define CONFIG_COMMANDS	      ( CONFIG_CMD_DFL	| \  				CFG_CMD_ASKENV	| \ -				CFG_CMD_BMP     | \ -				CFG_CMD_JFFS2   | \ -				CFG_CMD_PING    | \ -				CFG_CMD_ELF     | \ +				CFG_CMD_BMP	| \ +				CFG_CMD_JFFS2	| \ +				CFG_CMD_PING	| \ +				CFG_CMD_ELF	| \  				CFG_CMD_REGINFO | \ -				CFG_CMD_DHCP    ) +				CFG_CMD_DHCP	)  #else -#define CONFIG_COMMANDS       ( CONFIG_CMD_DFL  | \ -		                CFG_CMD_ASKENV  | \ -				CFG_CMD_JFFS2   | \ -				CFG_CMD_PING    | \ -				CFG_CMD_ELF     | \ +#define CONFIG_COMMANDS	      ( CONFIG_CMD_DFL	| \ +				CFG_CMD_ASKENV	| \ +				CFG_CMD_JFFS2	| \ +				CFG_CMD_PING	| \ +				CFG_CMD_ELF	| \  				CFG_CMD_REGINFO | \ -				CFG_CMD_DHCP    ) -#endif  /* CONFIG_SPLASH_SCREEN */ +				CFG_CMD_DHCP	) +#endif	/* CONFIG_SPLASH_SCREEN */  /* test-only */ -#define CFG_JFFS2_FIRST_BANK    0           /* use for JFFS2 */ -#define CFG_JFFS2_NUM_BANKS     1           /* ! second bank contains U-Boot */ +#define CFG_JFFS2_FIRST_BANK	0	    /* use for JFFS2 */ +#define CFG_JFFS2_NUM_BANKS	1	    /* ! second bank contains U-Boot */  #define CONFIG_NETCONSOLE -#endif  /* 1 */ +#endif	/* 1 */  /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */  #include <cmd_confdefs.h> @@ -310,7 +310,7 @@  #if defined(RPXlite_64MHz)  #define CFG_SCCR	( SCCR_TBS | SCCR_EBDF01 )  /* %%%SCCR:0x02020000 */  #else -#define CFG_SCCR        ( SCCR_TBS | SCCR_EBDF00 )  /* %%%SCCR:0x02000000 */ +#define CFG_SCCR	( SCCR_TBS | SCCR_EBDF00 )  /* %%%SCCR:0x02000000 */  #endif  /*----------------------------------------------------------------------- |