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| author | Evan Wilson <evan@oliodevices.com> | 2014-04-01 15:41:34 -0700 |
|---|---|---|
| committer | Evan Wilson <evan@oliodevices.com> | 2014-04-01 15:41:34 -0700 |
| commit | f4d04a981185bddead44a586a33ecda53c133fe7 (patch) | |
| tree | 9be498b73842f7017153bea9f772ad7ade113b55 | |
| parent | 98eaff30765bd4cce711e594034d01238354464a (diff) | |
| download | olio-uboot-2014.01-f4d04a981185bddead44a586a33ecda53c133fe7.tar.xz olio-uboot-2014.01-f4d04a981185bddead44a586a33ecda53c133fe7.zip | |
U-boot flashed and booting
| -rw-r--r-- | .gitignore | 4 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/omap3/board.c | 2 | ||||
| -rw-r--r-- | common/spl/spl.c | 9 | ||||
| -rw-r--r-- | include/configs/omap3_h1.h | 14 |
4 files changed, 20 insertions, 9 deletions
diff --git a/.gitignore b/.gitignore index a39bd54d3..14cdea38b 100644 --- a/.gitignore +++ b/.gitignore @@ -18,6 +18,10 @@ *.cfgtmp *.dts.tmp +# TI CCS project ignores +.cproject +.project + # Build tree /build-* diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c index 7d1f8d9d2..d1d33cc9e 100644 --- a/arch/arm/cpu/armv7/omap3/board.c +++ b/arch/arm/cpu/armv7/omap3/board.c @@ -75,7 +75,7 @@ u32 spl_boot_mode(void) u32 spl_boot_device(void) { - return omap3_boot_device; + return BOOT_DEVICE_NAND; } int board_mmc_init(bd_t *bis) diff --git a/common/spl/spl.c b/common/spl/spl.c index da31457d5..2c7ca16dc 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -156,6 +156,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2) switch (boot_device) { #ifdef CONFIG_SPL_RAM_DEVICE case BOOT_DEVICE_RAM: + debug("Booting from RAM\n"); spl_ram_load_image(); break; #endif @@ -163,37 +164,44 @@ void board_init_r(gd_t *dummy1, ulong dummy2) case BOOT_DEVICE_MMC1: case BOOT_DEVICE_MMC2: case BOOT_DEVICE_MMC2_2: + debug("Booting from MMC\n"); spl_mmc_load_image(); break; #endif #ifdef CONFIG_SPL_NAND_SUPPORT case BOOT_DEVICE_NAND: + debug("Booting from NAND\n"); spl_nand_load_image(); break; #endif #ifdef CONFIG_SPL_ONENAND_SUPPORT case BOOT_DEVICE_ONENAND: + debug("Booting from ONENAND\n"); spl_onenand_load_image(); break; #endif #ifdef CONFIG_SPL_NOR_SUPPORT case BOOT_DEVICE_NOR: + debug("Booting from NOR\n"); spl_nor_load_image(); break; #endif #ifdef CONFIG_SPL_YMODEM_SUPPORT case BOOT_DEVICE_UART: + debug("Booting from Y modem\n"); spl_ymodem_load_image(); break; #endif #ifdef CONFIG_SPL_SPI_SUPPORT case BOOT_DEVICE_SPI: + debug("Booting from SPI\n"); spl_spi_load_image(); break; #endif #ifdef CONFIG_SPL_ETH_SUPPORT case BOOT_DEVICE_CPGMAC: #ifdef CONFIG_SPL_ETH_DEVICE + debug("Booting from ETH\n"); spl_net_load_image(CONFIG_SPL_ETH_DEVICE); #else spl_net_load_image(NULL); @@ -202,6 +210,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2) #endif #ifdef CONFIG_SPL_USBETH_SUPPORT case BOOT_DEVICE_USBETH: + debug("Booting from USB ETHER\"); spl_net_load_image("usb_ether"); break; #endif diff --git a/include/configs/omap3_h1.h b/include/configs/omap3_h1.h index 8f57a72c5..ee599f0e0 100644 --- a/include/configs/omap3_h1.h +++ b/include/configs/omap3_h1.h @@ -32,13 +32,13 @@ #define CONFIG_DISPLAY_BOARDINFO 1 /* Clock Defines */ -#define V_OSCK 26000000 /* Clock output from T2 */ +#define V_OSCK 12000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -#define CONFIG_MISC_INIT_R +#define CONFIG_MISC_INIT_R /* misc_init_r() function for platform */ -#define CONFIG_OF_LIBFDT -#define CONFIG_CMD_BOOTZ +#define CONFIG_OF_LIBFDT /* FDT support */ +#define CONFIG_CMD_BOOTZ /* zImage support */ #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 @@ -267,8 +267,6 @@ CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) -#define CONFIG_OMAP3_SPI - #define CONFIG_SYS_CACHELINE_SIZE 64 /* Defines for SPL */ @@ -300,8 +298,8 @@ /* NAND boot config */ #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_PAGE_SIZE 1024 -#define CONFIG_SYS_NAND_OOBSIZE 32 +#define CONFIG_SYS_NAND_PAGE_SIZE 2048 +#define CONFIG_SYS_NAND_OOBSIZE 64 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ |