diff options
Diffstat (limited to 'drivers/scsi/lpfc/lpfc_hw.h')
| -rw-r--r-- | drivers/scsi/lpfc/lpfc_hw.h | 142 | 
1 files changed, 99 insertions, 43 deletions
diff --git a/drivers/scsi/lpfc/lpfc_hw.h b/drivers/scsi/lpfc/lpfc_hw.h index 4168c7b498b..02aa016b93e 100644 --- a/drivers/scsi/lpfc/lpfc_hw.h +++ b/drivers/scsi/lpfc/lpfc_hw.h @@ -1,7 +1,7 @@  /*******************************************************************   * This file is part of the Emulex Linux Device Driver for         *   * Fibre Channel Host Bus Adapters.                                * - * Copyright (C) 2004-2008 Emulex.  All rights reserved.           * + * Copyright (C) 2004-2009 Emulex.  All rights reserved.           *   * EMULEX and SLI are trademarks of Emulex.                        *   * www.emulex.com                                                  *   *                                                                 * @@ -471,6 +471,35 @@ struct serv_parm {	/* Structure is in Big Endian format */  };  /* + * Virtual Fabric Tagging Header + */ +struct fc_vft_header { +	 uint32_t word0; +#define fc_vft_hdr_r_ctl_SHIFT		24 +#define fc_vft_hdr_r_ctl_MASK		0xFF +#define fc_vft_hdr_r_ctl_WORD		word0 +#define fc_vft_hdr_ver_SHIFT		22 +#define fc_vft_hdr_ver_MASK		0x3 +#define fc_vft_hdr_ver_WORD		word0 +#define fc_vft_hdr_type_SHIFT		18 +#define fc_vft_hdr_type_MASK		0xF +#define fc_vft_hdr_type_WORD		word0 +#define fc_vft_hdr_e_SHIFT		16 +#define fc_vft_hdr_e_MASK		0x1 +#define fc_vft_hdr_e_WORD		word0 +#define fc_vft_hdr_priority_SHIFT	13 +#define fc_vft_hdr_priority_MASK	0x7 +#define fc_vft_hdr_priority_WORD	word0 +#define fc_vft_hdr_vf_id_SHIFT		1 +#define fc_vft_hdr_vf_id_MASK		0xFFF +#define fc_vft_hdr_vf_id_WORD		word0 +	uint32_t word1; +#define fc_vft_hdr_hopct_SHIFT		24 +#define fc_vft_hdr_hopct_MASK		0xFF +#define fc_vft_hdr_hopct_WORD		word1 +}; + +/*   *  Extended Link Service LS_COMMAND codes (Payload Word 0)   */  #ifdef __BIG_ENDIAN_BITFIELD @@ -1152,6 +1181,9 @@ typedef struct {  #define PCI_DEVICE_ID_HORNET        0xfe05  #define PCI_DEVICE_ID_ZEPHYR_SCSP   0xfe11  #define PCI_DEVICE_ID_ZEPHYR_DCSP   0xfe12 +#define PCI_VENDOR_ID_SERVERENGINE  0x19a2 +#define PCI_DEVICE_ID_TIGERSHARK    0x0704 +#define PCI_DEVICE_ID_TIGERSHARK_S  0x0705  #define JEDEC_ID_ADDRESS            0x0080001c  #define FIREFLY_JEDEC_ID            0x1ACC @@ -1342,15 +1374,21 @@ typedef struct {		/* FireFly BIU registers */  #define MBX_READ_LA64       0x95  #define MBX_REG_VPI	    0x96  #define MBX_UNREG_VPI	    0x97 -#define MBX_REG_VNPID	    0x96 -#define MBX_UNREG_VNPID	    0x97  #define MBX_WRITE_WWN       0x98  #define MBX_SET_DEBUG       0x99  #define MBX_LOAD_EXP_ROM    0x9C - -#define MBX_MAX_CMDS        0x9D +#define MBX_SLI4_CONFIG	    0x9B +#define MBX_SLI4_REQ_FTRS   0x9D +#define MBX_MAX_CMDS        0x9E +#define MBX_RESUME_RPI      0x9E  #define MBX_SLI2_CMD_MASK   0x80 +#define MBX_REG_VFI         0x9F +#define MBX_REG_FCFI        0xA0 +#define MBX_UNREG_VFI       0xA1 +#define MBX_UNREG_FCFI	    0xA2 +#define MBX_INIT_VFI        0xA3 +#define MBX_INIT_VPI        0xA4  /* IOCB Commands */ @@ -1440,6 +1478,16 @@ typedef struct {		/* FireFly BIU registers */  #define CMD_IOCB_LOGENTRY_CN		0x94  #define CMD_IOCB_LOGENTRY_ASYNC_CN	0x96 +/* Unhandled Data Security SLI Commands */ +#define DSSCMD_IWRITE64_CR 		0xD8 +#define DSSCMD_IWRITE64_CX		0xD9 +#define DSSCMD_IREAD64_CR		0xDA +#define DSSCMD_IREAD64_CX		0xDB +#define DSSCMD_INVALIDATE_DEK		0xDC +#define DSSCMD_SET_KEK			0xDD +#define DSSCMD_GET_KEK_ID		0xDE +#define DSSCMD_GEN_XFER			0xDF +  #define CMD_MAX_IOCB_CMD        0xE6  #define CMD_IOCB_MASK           0xff @@ -1466,6 +1514,7 @@ typedef struct {		/* FireFly BIU registers */  #define MBXERR_BAD_RCV_LENGTH       14  #define MBXERR_DMA_ERROR            15  #define MBXERR_ERROR                16 +#define MBXERR_LINK_DOWN            0x33  #define MBX_NOT_FINISHED           255  #define MBX_BUSY                   0xffffff /* Attempted cmd to busy Mailbox */ @@ -1504,32 +1553,6 @@ struct ulp_bde {  #endif  }; -struct ulp_bde64 {	/* SLI-2 */ -	union ULP_BDE_TUS { -		uint32_t w; -		struct { -#ifdef __BIG_ENDIAN_BITFIELD -			uint32_t bdeFlags:8;	/* BDE Flags 0 IS A SUPPORTED -						   VALUE !! */ -			uint32_t bdeSize:24;	/* Size of buffer (in bytes) */ -#else	/*  __LITTLE_ENDIAN_BITFIELD */ -			uint32_t bdeSize:24;	/* Size of buffer (in bytes) */ -			uint32_t bdeFlags:8;	/* BDE Flags 0 IS A SUPPORTED -						   VALUE !! */ -#endif -#define BUFF_TYPE_BDE_64    0x00	/* BDE (Host_resident) */ -#define BUFF_TYPE_BDE_IMMED 0x01	/* Immediate Data BDE */ -#define BUFF_TYPE_BDE_64P   0x02	/* BDE (Port-resident) */ -#define BUFF_TYPE_BDE_64I   0x08	/* Input BDE (Host-resident) */ -#define BUFF_TYPE_BDE_64IP  0x0A	/* Input BDE (Port-resident) */ -#define BUFF_TYPE_BLP_64    0x40	/* BLP (Host-resident) */ -#define BUFF_TYPE_BLP_64P   0x42	/* BLP (Port-resident) */ -		} f; -	} tus; -	uint32_t addrLow; -	uint32_t addrHigh; -}; -  typedef struct ULP_BDL {	/* SLI-2 */  #ifdef __BIG_ENDIAN_BITFIELD  	uint32_t bdeFlags:8;	/* BDL Flags */ @@ -2287,7 +2310,7 @@ typedef struct {  	uint32_t rsvd3;  	uint32_t rsvd4;  	uint32_t rsvd5; -	uint16_t rsvd6; +	uint16_t vfi;  	uint16_t vpi;  #else	/*  __LITTLE_ENDIAN */  	uint32_t rsvd1; @@ -2297,7 +2320,7 @@ typedef struct {  	uint32_t rsvd4;  	uint32_t rsvd5;  	uint16_t vpi; -	uint16_t rsvd6; +	uint16_t vfi;  #endif  } REG_VPI_VAR; @@ -2457,7 +2480,7 @@ typedef struct {  	uint32_t entry_index:16;  #endif -	uint32_t rsvd1; +	uint32_t sli4_length;  	uint32_t word_cnt;  	uint32_t resp_offset;  } DUMP_VAR; @@ -2470,9 +2493,32 @@ typedef struct {  #define  DMP_RSP_OFFSET          0x14   /* word 5 contains first word of rsp */  #define  DMP_RSP_SIZE            0x6C   /* maximum of 27 words of rsp data */ +#define  DMP_REGION_VPORT	 0x16   /* VPort info region */ +#define  DMP_VPORT_REGION_SIZE	 0x200 +#define  DMP_MBOX_OFFSET_WORD	 0x5 + +#define  DMP_REGION_FCOEPARAM	 0x17   /* fcoe param region */ +#define  DMP_FCOEPARAM_RGN_SIZE	 0x400 +  #define  WAKE_UP_PARMS_REGION_ID    4  #define  WAKE_UP_PARMS_WORD_SIZE   15 +struct vport_rec { +	uint8_t wwpn[8]; +	uint8_t wwnn[8]; +}; + +#define VPORT_INFO_SIG 0x32324752 +#define VPORT_INFO_REV_MASK 0xff +#define VPORT_INFO_REV 0x1 +#define MAX_STATIC_VPORT_COUNT 16 +struct static_vport_info { +	uint32_t 		signature; +	uint32_t		rev; +	struct vport_rec 	vport_list[MAX_STATIC_VPORT_COUNT]; +	uint32_t		resvd[66]; +}; +  /* Option rom version structure */  struct prog_id {  #ifdef __BIG_ENDIAN_BITFIELD @@ -2697,7 +2743,9 @@ typedef struct {  #endif  #ifdef __BIG_ENDIAN_BITFIELD -	uint32_t rsvd1     : 23;  /* Reserved                             */ +	uint32_t rsvd1     : 19;  /* Reserved                             */ +	uint32_t cdss      :  1;  /* Configure Data Security SLI          */ +	uint32_t rsvd2     :  3;  /* Reserved                             */  	uint32_t cbg       :  1;  /* Configure BlockGuard                 */  	uint32_t cmv       :  1;  /* Configure Max VPIs                   */  	uint32_t ccrp      :  1;  /* Config Command Ring Polling          */ @@ -2717,10 +2765,14 @@ typedef struct {  	uint32_t ccrp      :  1;  /* Config Command Ring Polling          */  	uint32_t cmv	   :  1;  /* Configure Max VPIs                   */  	uint32_t cbg       :  1;  /* Configure BlockGuard                 */ -	uint32_t rsvd1     : 23;  /* Reserved                             */ +	uint32_t rsvd2     :  3;  /* Reserved                             */ +	uint32_t cdss      :  1;  /* Configure Data Security SLI          */ +	uint32_t rsvd1     : 19;  /* Reserved                             */  #endif  #ifdef __BIG_ENDIAN_BITFIELD -	uint32_t rsvd2     : 23;  /* Reserved                             */ +	uint32_t rsvd3     : 19;  /* Reserved                             */ +	uint32_t gdss      :  1;  /* Configure Data Security SLI          */ +	uint32_t rsvd4     :  3;  /* Reserved                             */  	uint32_t gbg       :  1;  /* Grant BlockGuard                     */  	uint32_t gmv	   :  1;  /* Grant Max VPIs                       */  	uint32_t gcrp	   :  1;  /* Grant Command Ring Polling           */ @@ -2740,7 +2792,9 @@ typedef struct {  	uint32_t gcrp	   :  1;  /* Grant Command Ring Polling           */  	uint32_t gmv	   :  1;  /* Grant Max VPIs                       */  	uint32_t gbg       :  1;  /* Grant BlockGuard                     */ -	uint32_t rsvd2     : 23;  /* Reserved                             */ +	uint32_t rsvd4     :  3;  /* Reserved                             */ +	uint32_t gdss      :  1;  /* Configure Data Security SLI          */ +	uint32_t rsvd3     : 19;  /* Reserved                             */  #endif  #ifdef __BIG_ENDIAN_BITFIELD @@ -2753,20 +2807,20 @@ typedef struct {  #ifdef __BIG_ENDIAN_BITFIELD  	uint32_t max_hbq   : 16;  /* Max HBQs Host expect to configure    */ -	uint32_t rsvd3     : 16;  /* Max HBQs Host expect to configure    */ +	uint32_t rsvd5     : 16;  /* Max HBQs Host expect to configure    */  #else	/*  __LITTLE_ENDIAN */ -	uint32_t rsvd3     : 16;  /* Max HBQs Host expect to configure    */ +	uint32_t rsvd5     : 16;  /* Max HBQs Host expect to configure    */  	uint32_t max_hbq   : 16;  /* Max HBQs Host expect to configure    */  #endif -	uint32_t rsvd4;           /* Reserved                             */ +	uint32_t rsvd6;           /* Reserved                             */  #ifdef __BIG_ENDIAN_BITFIELD -	uint32_t rsvd5      : 16;  /* Reserved                             */ +	uint32_t rsvd7      : 16;  /* Reserved                             */  	uint32_t max_vpi    : 16;  /* Max number of virt N-Ports           */  #else	/*  __LITTLE_ENDIAN */  	uint32_t max_vpi    : 16;  /* Max number of virt N-Ports           */ -	uint32_t rsvd5      : 16;  /* Reserved                             */ +	uint32_t rsvd7      : 16;  /* Reserved                             */  #endif  } CONFIG_PORT_VAR; @@ -3666,3 +3720,5 @@ lpfc_error_lost_link(IOCB_t *iocbp)  #define MENLO_TIMEOUT 30  #define SETVAR_MLOMNT 0x103107  #define SETVAR_MLORST 0x103007 + +#define BPL_ALIGN_SZ 8 /* 8 byte alignment for bpl and mbufs */  |