diff options
Diffstat (limited to 'drivers/net/can/c_can/c_can.h')
| -rw-r--r-- | drivers/net/can/c_can/c_can.h | 164 | 
1 files changed, 126 insertions, 38 deletions
diff --git a/drivers/net/can/c_can/c_can.h b/drivers/net/can/c_can/c_can.h index 9b7fbef3d09..01a7049ab99 100644 --- a/drivers/net/can/c_can/c_can.h +++ b/drivers/net/can/c_can/c_can.h @@ -22,43 +22,129 @@  #ifndef C_CAN_H  #define C_CAN_H -/* c_can IF registers */ -struct c_can_if_regs { -	u16 com_req; -	u16 com_mask; -	u16 mask1; -	u16 mask2; -	u16 arb1; -	u16 arb2; -	u16 msg_cntrl; -	u16 data[4]; -	u16 _reserved[13]; +enum reg { +	C_CAN_CTRL_REG = 0, +	C_CAN_STS_REG, +	C_CAN_ERR_CNT_REG, +	C_CAN_BTR_REG, +	C_CAN_INT_REG, +	C_CAN_TEST_REG, +	C_CAN_BRPEXT_REG, +	C_CAN_IF1_COMREQ_REG, +	C_CAN_IF1_COMMSK_REG, +	C_CAN_IF1_MASK1_REG, +	C_CAN_IF1_MASK2_REG, +	C_CAN_IF1_ARB1_REG, +	C_CAN_IF1_ARB2_REG, +	C_CAN_IF1_MSGCTRL_REG, +	C_CAN_IF1_DATA1_REG, +	C_CAN_IF1_DATA2_REG, +	C_CAN_IF1_DATA3_REG, +	C_CAN_IF1_DATA4_REG, +	C_CAN_IF2_COMREQ_REG, +	C_CAN_IF2_COMMSK_REG, +	C_CAN_IF2_MASK1_REG, +	C_CAN_IF2_MASK2_REG, +	C_CAN_IF2_ARB1_REG, +	C_CAN_IF2_ARB2_REG, +	C_CAN_IF2_MSGCTRL_REG, +	C_CAN_IF2_DATA1_REG, +	C_CAN_IF2_DATA2_REG, +	C_CAN_IF2_DATA3_REG, +	C_CAN_IF2_DATA4_REG, +	C_CAN_TXRQST1_REG, +	C_CAN_TXRQST2_REG, +	C_CAN_NEWDAT1_REG, +	C_CAN_NEWDAT2_REG, +	C_CAN_INTPND1_REG, +	C_CAN_INTPND2_REG, +	C_CAN_MSGVAL1_REG, +	C_CAN_MSGVAL2_REG,  }; -/* c_can hardware registers */ -struct c_can_regs { -	u16 control; -	u16 status; -	u16 err_cnt; -	u16 btr; -	u16 interrupt; -	u16 test; -	u16 brp_ext; -	u16 _reserved1; -	struct c_can_if_regs ifregs[2]; /* [0] = IF1 and [1] = IF2 */ -	u16 _reserved2[8]; -	u16 txrqst1; -	u16 txrqst2; -	u16 _reserved3[6]; -	u16 newdat1; -	u16 newdat2; -	u16 _reserved4[6]; -	u16 intpnd1; -	u16 intpnd2; -	u16 _reserved5[6]; -	u16 msgval1; -	u16 msgval2; -	u16 _reserved6[6]; +static const u16 reg_map_c_can[] = { +	[C_CAN_CTRL_REG]	= 0x00, +	[C_CAN_STS_REG]		= 0x02, +	[C_CAN_ERR_CNT_REG]	= 0x04, +	[C_CAN_BTR_REG]		= 0x06, +	[C_CAN_INT_REG]		= 0x08, +	[C_CAN_TEST_REG]	= 0x0A, +	[C_CAN_BRPEXT_REG]	= 0x0C, +	[C_CAN_IF1_COMREQ_REG]	= 0x10, +	[C_CAN_IF1_COMMSK_REG]	= 0x12, +	[C_CAN_IF1_MASK1_REG]	= 0x14, +	[C_CAN_IF1_MASK2_REG]	= 0x16, +	[C_CAN_IF1_ARB1_REG]	= 0x18, +	[C_CAN_IF1_ARB2_REG]	= 0x1A, +	[C_CAN_IF1_MSGCTRL_REG]	= 0x1C, +	[C_CAN_IF1_DATA1_REG]	= 0x1E, +	[C_CAN_IF1_DATA2_REG]	= 0x20, +	[C_CAN_IF1_DATA3_REG]	= 0x22, +	[C_CAN_IF1_DATA4_REG]	= 0x24, +	[C_CAN_IF2_COMREQ_REG]	= 0x40, +	[C_CAN_IF2_COMMSK_REG]	= 0x42, +	[C_CAN_IF2_MASK1_REG]	= 0x44, +	[C_CAN_IF2_MASK2_REG]	= 0x46, +	[C_CAN_IF2_ARB1_REG]	= 0x48, +	[C_CAN_IF2_ARB2_REG]	= 0x4A, +	[C_CAN_IF2_MSGCTRL_REG]	= 0x4C, +	[C_CAN_IF2_DATA1_REG]	= 0x4E, +	[C_CAN_IF2_DATA2_REG]	= 0x50, +	[C_CAN_IF2_DATA3_REG]	= 0x52, +	[C_CAN_IF2_DATA4_REG]	= 0x54, +	[C_CAN_TXRQST1_REG]	= 0x80, +	[C_CAN_TXRQST2_REG]	= 0x82, +	[C_CAN_NEWDAT1_REG]	= 0x90, +	[C_CAN_NEWDAT2_REG]	= 0x92, +	[C_CAN_INTPND1_REG]	= 0xA0, +	[C_CAN_INTPND2_REG]	= 0xA2, +	[C_CAN_MSGVAL1_REG]	= 0xB0, +	[C_CAN_MSGVAL2_REG]	= 0xB2, +}; + +static const u16 reg_map_d_can[] = { +	[C_CAN_CTRL_REG]	= 0x00, +	[C_CAN_STS_REG]		= 0x04, +	[C_CAN_ERR_CNT_REG]	= 0x08, +	[C_CAN_BTR_REG]		= 0x0C, +	[C_CAN_BRPEXT_REG]	= 0x0E, +	[C_CAN_INT_REG]		= 0x10, +	[C_CAN_TEST_REG]	= 0x14, +	[C_CAN_TXRQST1_REG]	= 0x88, +	[C_CAN_TXRQST2_REG]	= 0x8A, +	[C_CAN_NEWDAT1_REG]	= 0x9C, +	[C_CAN_NEWDAT2_REG]	= 0x9E, +	[C_CAN_INTPND1_REG]	= 0xB0, +	[C_CAN_INTPND2_REG]	= 0xB2, +	[C_CAN_MSGVAL1_REG]	= 0xC4, +	[C_CAN_MSGVAL2_REG]	= 0xC6, +	[C_CAN_IF1_COMREQ_REG]	= 0x100, +	[C_CAN_IF1_COMMSK_REG]	= 0x102, +	[C_CAN_IF1_MASK1_REG]	= 0x104, +	[C_CAN_IF1_MASK2_REG]	= 0x106, +	[C_CAN_IF1_ARB1_REG]	= 0x108, +	[C_CAN_IF1_ARB2_REG]	= 0x10A, +	[C_CAN_IF1_MSGCTRL_REG]	= 0x10C, +	[C_CAN_IF1_DATA1_REG]	= 0x110, +	[C_CAN_IF1_DATA2_REG]	= 0x112, +	[C_CAN_IF1_DATA3_REG]	= 0x114, +	[C_CAN_IF1_DATA4_REG]	= 0x116, +	[C_CAN_IF2_COMREQ_REG]	= 0x120, +	[C_CAN_IF2_COMMSK_REG]	= 0x122, +	[C_CAN_IF2_MASK1_REG]	= 0x124, +	[C_CAN_IF2_MASK2_REG]	= 0x126, +	[C_CAN_IF2_ARB1_REG]	= 0x128, +	[C_CAN_IF2_ARB2_REG]	= 0x12A, +	[C_CAN_IF2_MSGCTRL_REG]	= 0x12C, +	[C_CAN_IF2_DATA1_REG]	= 0x130, +	[C_CAN_IF2_DATA2_REG]	= 0x132, +	[C_CAN_IF2_DATA3_REG]	= 0x134, +	[C_CAN_IF2_DATA4_REG]	= 0x136, +}; + +enum c_can_dev_id { +	C_CAN_DEVTYPE, +	D_CAN_DEVTYPE,  };  /* c_can private data structure */ @@ -69,13 +155,15 @@ struct c_can_priv {  	int tx_object;  	int current_status;  	int last_status; -	u16 (*read_reg) (struct c_can_priv *priv, void *reg); -	void (*write_reg) (struct c_can_priv *priv, void *reg, u16 val); -	struct c_can_regs __iomem *regs; +	u16 (*read_reg) (struct c_can_priv *priv, enum reg index); +	void (*write_reg) (struct c_can_priv *priv, enum reg index, u16 val); +	void __iomem *base; +	const u16 *regs;  	unsigned long irq_flags; /* for request_irq() */  	unsigned int tx_next;  	unsigned int tx_echo;  	void *priv;		/* for board-specific data */ +	u16 irqstatus;  };  struct net_device *alloc_c_can_dev(void);  |