diff options
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_drv.h')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_drv.h | 55 | 
1 files changed, 52 insertions, 3 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h index e15db15dca7..b1be617373b 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drv.h +++ b/drivers/gpu/drm/nouveau/nouveau_drv.h @@ -410,7 +410,7 @@ enum nv04_fp_display_regs {  struct nv04_crtc_reg {  	unsigned char MiscOutReg;     /* */ -	uint8_t CRTC[0x9f]; +	uint8_t CRTC[0xa0];  	uint8_t CR58[0x10];  	uint8_t Sequencer[5];  	uint8_t Graphics[9]; @@ -509,6 +509,7 @@ enum nouveau_card_type {  	NV_30      = 0x30,  	NV_40      = 0x40,  	NV_50      = 0x50, +	NV_C0      = 0xc0,  };  struct drm_nouveau_private { @@ -536,8 +537,6 @@ struct drm_nouveau_private {  		struct drm_global_reference mem_global_ref;  		struct ttm_bo_global_ref bo_global_ref;  		struct ttm_bo_device bdev; -		spinlock_t bo_list_lock; -		struct list_head bo_list;  		atomic_t validate_sequence;  	} ttm; @@ -931,6 +930,10 @@ extern void nv40_fb_set_region_tiling(struct drm_device *, int, uint32_t,  extern int  nv50_fb_init(struct drm_device *);  extern void nv50_fb_takedown(struct drm_device *); +/* nvc0_fb.c */ +extern int  nvc0_fb_init(struct drm_device *); +extern void nvc0_fb_takedown(struct drm_device *); +  /* nv04_fifo.c */  extern int  nv04_fifo_init(struct drm_device *);  extern void nv04_fifo_disable(struct drm_device *); @@ -968,6 +971,20 @@ extern void nv50_fifo_destroy_context(struct nouveau_channel *);  extern int  nv50_fifo_load_context(struct nouveau_channel *);  extern int  nv50_fifo_unload_context(struct drm_device *); +/* nvc0_fifo.c */ +extern int  nvc0_fifo_init(struct drm_device *); +extern void nvc0_fifo_takedown(struct drm_device *); +extern void nvc0_fifo_disable(struct drm_device *); +extern void nvc0_fifo_enable(struct drm_device *); +extern bool nvc0_fifo_reassign(struct drm_device *, bool); +extern bool nvc0_fifo_cache_flush(struct drm_device *); +extern bool nvc0_fifo_cache_pull(struct drm_device *, bool); +extern int  nvc0_fifo_channel_id(struct drm_device *); +extern int  nvc0_fifo_create_context(struct nouveau_channel *); +extern void nvc0_fifo_destroy_context(struct nouveau_channel *); +extern int  nvc0_fifo_load_context(struct nouveau_channel *); +extern int  nvc0_fifo_unload_context(struct drm_device *); +  /* nv04_graph.c */  extern struct nouveau_pgraph_object_class nv04_graph_grclass[];  extern int  nv04_graph_init(struct drm_device *); @@ -1032,6 +1049,16 @@ extern int  nv50_graph_unload_context(struct drm_device *);  extern void nv50_graph_context_switch(struct drm_device *);  extern int  nv50_grctx_init(struct nouveau_grctx *); +/* nvc0_graph.c */ +extern int  nvc0_graph_init(struct drm_device *); +extern void nvc0_graph_takedown(struct drm_device *); +extern void nvc0_graph_fifo_access(struct drm_device *, bool); +extern struct nouveau_channel *nvc0_graph_channel(struct drm_device *); +extern int  nvc0_graph_create_context(struct nouveau_channel *); +extern void nvc0_graph_destroy_context(struct nouveau_channel *); +extern int  nvc0_graph_load_context(struct nouveau_channel *); +extern int  nvc0_graph_unload_context(struct drm_device *); +  /* nv04_instmem.c */  extern int  nv04_instmem_init(struct drm_device *);  extern void nv04_instmem_takedown(struct drm_device *); @@ -1058,6 +1085,18 @@ extern void nv50_instmem_flush(struct drm_device *);  extern void nv84_instmem_flush(struct drm_device *);  extern void nv50_vm_flush(struct drm_device *, int engine); +/* nvc0_instmem.c */ +extern int  nvc0_instmem_init(struct drm_device *); +extern void nvc0_instmem_takedown(struct drm_device *); +extern int  nvc0_instmem_suspend(struct drm_device *); +extern void nvc0_instmem_resume(struct drm_device *); +extern int  nvc0_instmem_populate(struct drm_device *, struct nouveau_gpuobj *, +				  uint32_t *size); +extern void nvc0_instmem_clear(struct drm_device *, struct nouveau_gpuobj *); +extern int  nvc0_instmem_bind(struct drm_device *, struct nouveau_gpuobj *); +extern int  nvc0_instmem_unbind(struct drm_device *, struct nouveau_gpuobj *); +extern void nvc0_instmem_flush(struct drm_device *); +  /* nv04_mc.c */  extern int  nv04_mc_init(struct drm_device *);  extern void nv04_mc_takedown(struct drm_device *); @@ -1126,6 +1165,7 @@ extern u16 nouveau_bo_rd16(struct nouveau_bo *nvbo, unsigned index);  extern void nouveau_bo_wr16(struct nouveau_bo *nvbo, unsigned index, u16 val);  extern u32 nouveau_bo_rd32(struct nouveau_bo *nvbo, unsigned index);  extern void nouveau_bo_wr32(struct nouveau_bo *nvbo, unsigned index, u32 val); +extern int nouveau_bo_sync_gpu(struct nouveau_bo *, struct nouveau_channel *);  /* nouveau_fence.c */  struct nouveau_fence; @@ -1349,6 +1389,15 @@ nv_two_reg_pll(struct drm_device *dev)  	return false;  } +static inline bool +nv_match_device(struct drm_device *dev, unsigned device, +		unsigned sub_vendor, unsigned sub_device) +{ +	return dev->pdev->device == device && +		dev->pdev->subsystem_vendor == sub_vendor && +		dev->pdev->subsystem_device == sub_device; +} +  #define NV_SW                                                        0x0000506e  #define NV_SW_DMA_SEMAPHORE                                          0x00000060  #define NV_SW_SEMAPHORE_OFFSET                                       0x00000064  |