diff options
Diffstat (limited to 'drivers/gpu/drm/i915/i915_debugfs.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_debugfs.c | 22 | 
1 files changed, 12 insertions, 10 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index dde8b505bf7..0e405e5278e 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -1068,7 +1068,7 @@ static int gen6_drpc_info(struct seq_file *m)  	struct drm_info_node *node = (struct drm_info_node *) m->private;  	struct drm_device *dev = node->minor->dev;  	struct drm_i915_private *dev_priv = dev->dev_private; -	u32 rpmodectl1, gt_core_status, rcctl1; +	u32 rpmodectl1, gt_core_status, rcctl1, rc6vids = 0;  	unsigned forcewake_count;  	int count=0, ret; @@ -1096,6 +1096,7 @@ static int gen6_drpc_info(struct seq_file *m)  	rpmodectl1 = I915_READ(GEN6_RP_CONTROL);  	rcctl1 = I915_READ(GEN6_RC_CONTROL); +	sandybridge_pcode_read(dev_priv, GEN6_PCODE_READ_RC6VIDS, &rc6vids);  	mutex_unlock(&dev->struct_mutex);  	seq_printf(m, "Video Turbo Mode: %s\n", @@ -1148,6 +1149,12 @@ static int gen6_drpc_info(struct seq_file *m)  	seq_printf(m, "RC6++ residency since boot: %u\n",  		   I915_READ(GEN6_GT_GFX_RC6pp)); +	seq_printf(m, "RC6   voltage: %dmV\n", +		   GEN6_DECODE_RC6_VID(((rc6vids >> 0) & 0xff))); +	seq_printf(m, "RC6+  voltage: %dmV\n", +		   GEN6_DECODE_RC6_VID(((rc6vids >> 8) & 0xff))); +	seq_printf(m, "RC6++ voltage: %dmV\n", +		   GEN6_DECODE_RC6_VID(((rc6vids >> 16) & 0xff)));  	return 0;  } @@ -1282,15 +1289,10 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused)  	for (gpu_freq = dev_priv->rps.min_delay;  	     gpu_freq <= dev_priv->rps.max_delay;  	     gpu_freq++) { -		I915_WRITE(GEN6_PCODE_DATA, gpu_freq); -		I915_WRITE(GEN6_PCODE_MAILBOX, GEN6_PCODE_READY | -			   GEN6_PCODE_READ_MIN_FREQ_TABLE); -		if (wait_for((I915_READ(GEN6_PCODE_MAILBOX) & -			      GEN6_PCODE_READY) == 0, 10)) { -			DRM_ERROR("pcode read of freq table timed out\n"); -			continue; -		} -		ia_freq = I915_READ(GEN6_PCODE_DATA); +		ia_freq = gpu_freq; +		sandybridge_pcode_read(dev_priv, +				       GEN6_PCODE_READ_MIN_FREQ_TABLE, +				       &ia_freq);  		seq_printf(m, "%d\t\t%d\n", gpu_freq * GT_FREQUENCY_MULTIPLIER, ia_freq * 100);  	}  |