diff options
Diffstat (limited to 'arch/powerpc/include/asm/cputable.h')
| -rw-r--r-- | arch/powerpc/include/asm/cputable.h | 55 | 
1 files changed, 28 insertions, 27 deletions
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h index 1833d1a07e7..c0d842cfd01 100644 --- a/arch/powerpc/include/asm/cputable.h +++ b/arch/powerpc/include/asm/cputable.h @@ -157,6 +157,7 @@ extern const char *powerpc_base_platform;  #define CPU_FTR_476_DD2			ASM_CONST(0x0000000000010000)  #define CPU_FTR_NEED_COHERENT		ASM_CONST(0x0000000000020000)  #define CPU_FTR_NO_BTIC			ASM_CONST(0x0000000000040000) +#define CPU_FTR_DEBUG_LVL_EXC		ASM_CONST(0x0000000000080000)  #define CPU_FTR_NODSISRALIGN		ASM_CONST(0x0000000000100000)  #define CPU_FTR_PPC_LE			ASM_CONST(0x0000000000200000)  #define CPU_FTR_REAL_LE			ASM_CONST(0x0000000000400000) @@ -178,22 +179,18 @@ extern const char *powerpc_base_platform;  #define LONG_ASM_CONST(x)		0  #endif -#define CPU_FTR_SLB			LONG_ASM_CONST(0x0000000100000000) -#define CPU_FTR_16M_PAGE		LONG_ASM_CONST(0x0000000200000000) -#define CPU_FTR_TLBIEL			LONG_ASM_CONST(0x0000000400000000) + +#define CPU_FTR_HVMODE_206		LONG_ASM_CONST(0x0000000800000000) +#define CPU_FTR_CFAR			LONG_ASM_CONST(0x0000001000000000)  #define CPU_FTR_IABR			LONG_ASM_CONST(0x0000002000000000)  #define CPU_FTR_MMCRA			LONG_ASM_CONST(0x0000004000000000)  #define CPU_FTR_CTRL			LONG_ASM_CONST(0x0000008000000000)  #define CPU_FTR_SMT			LONG_ASM_CONST(0x0000010000000000) -#define CPU_FTR_LOCKLESS_TLBIE		LONG_ASM_CONST(0x0000040000000000) -#define CPU_FTR_CI_LARGE_PAGE		LONG_ASM_CONST(0x0000100000000000)  #define CPU_FTR_PAUSE_ZERO		LONG_ASM_CONST(0x0000200000000000)  #define CPU_FTR_PURR			LONG_ASM_CONST(0x0000400000000000)  #define CPU_FTR_CELL_TB_BUG		LONG_ASM_CONST(0x0000800000000000)  #define CPU_FTR_SPURR			LONG_ASM_CONST(0x0001000000000000)  #define CPU_FTR_DSCR			LONG_ASM_CONST(0x0002000000000000) -#define CPU_FTR_1T_SEGMENT		LONG_ASM_CONST(0x0004000000000000) -#define CPU_FTR_NO_SLBIE_B		LONG_ASM_CONST(0x0008000000000000)  #define CPU_FTR_VSX			LONG_ASM_CONST(0x0010000000000000)  #define CPU_FTR_SAO			LONG_ASM_CONST(0x0020000000000000)  #define CPU_FTR_CP_USE_DCBTZ		LONG_ASM_CONST(0x0040000000000000) @@ -202,12 +199,14 @@ extern const char *powerpc_base_platform;  #define CPU_FTR_STCX_CHECKS_ADDRESS	LONG_ASM_CONST(0x0200000000000000)  #define CPU_FTR_POPCNTB			LONG_ASM_CONST(0x0400000000000000)  #define CPU_FTR_POPCNTD			LONG_ASM_CONST(0x0800000000000000) +#define CPU_FTR_ICSWX			LONG_ASM_CONST(0x1000000000000000)  #ifndef __ASSEMBLY__ -#define CPU_FTR_PPCAS_ARCH_V2	(CPU_FTR_SLB | \ -				 CPU_FTR_TLBIEL | CPU_FTR_NOEXECUTE | \ -				 CPU_FTR_NODSISRALIGN | CPU_FTR_16M_PAGE) +#define CPU_FTR_PPCAS_ARCH_V2	(CPU_FTR_NOEXECUTE | CPU_FTR_NODSISRALIGN) + +#define MMU_FTR_PPCAS_ARCH_V2 	(MMU_FTR_SLB | MMU_FTR_TLBIEL | \ +				 MMU_FTR_16M_PAGE)  /* We only set the altivec features if the kernel was compiled with altivec   * support @@ -387,7 +386,8 @@ extern const char *powerpc_base_platform;  	    CPU_FTR_DBELL)  #define CPU_FTRS_E5500	(CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | \  	    CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \ -	    CPU_FTR_DBELL | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD) +	    CPU_FTR_DBELL | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \ +	    CPU_FTR_DEBUG_LVL_EXC)  #define CPU_FTRS_GENERIC_32	(CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN)  /* 64-bit CPUs */ @@ -407,44 +407,45 @@ extern const char *powerpc_base_platform;  #define CPU_FTRS_POWER5	(CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \  	    CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \  	    CPU_FTR_MMCRA | CPU_FTR_SMT | \ -	    CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ -	    CPU_FTR_PURR | CPU_FTR_STCX_CHECKS_ADDRESS | \ -	    CPU_FTR_POPCNTB) +	    CPU_FTR_COHERENT_ICACHE | CPU_FTR_PURR | \ +	    CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB)  #define CPU_FTRS_POWER6 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \  	    CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \  	    CPU_FTR_MMCRA | CPU_FTR_SMT | \ -	    CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ +	    CPU_FTR_COHERENT_ICACHE | \  	    CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \  	    CPU_FTR_DSCR | CPU_FTR_UNALIGNED_LD_STD | \ -	    CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB) +	    CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_CFAR)  #define CPU_FTRS_POWER7 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ -	    CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ +	    CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | CPU_FTR_HVMODE_206 |\  	    CPU_FTR_MMCRA | CPU_FTR_SMT | \ -	    CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ +	    CPU_FTR_COHERENT_ICACHE | \  	    CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \  	    CPU_FTR_DSCR | CPU_FTR_SAO  | CPU_FTR_ASYM_SMT | \ -	    CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD) +	    CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \ +	    CPU_FTR_ICSWX | CPU_FTR_CFAR)  #define CPU_FTRS_CELL	(CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \  	    CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \  	    CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \ -	    CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE | \ -	    CPU_FTR_CELL_TB_BUG | CPU_FTR_CP_USE_DCBTZ | \ +	    CPU_FTR_PAUSE_ZERO  | CPU_FTR_CELL_TB_BUG | CPU_FTR_CP_USE_DCBTZ | \  	    CPU_FTR_UNALIGNED_LD_STD)  #define CPU_FTRS_PA6T (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ -	    CPU_FTR_PPCAS_ARCH_V2 | \ -	    CPU_FTR_ALTIVEC_COMP | CPU_FTR_CI_LARGE_PAGE | \ -	    CPU_FTR_PURR | CPU_FTR_REAL_LE | CPU_FTR_NO_SLBIE_B) +	    CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_ALTIVEC_COMP | \ +	    CPU_FTR_PURR | CPU_FTR_REAL_LE)  #define CPU_FTRS_COMPATIBLE	(CPU_FTR_USE_TB | CPU_FTR_PPCAS_ARCH_V2) +#define CPU_FTRS_A2 (CPU_FTR_USE_TB | CPU_FTR_SMT | CPU_FTR_DBELL | \ +		     CPU_FTR_NOEXECUTE | CPU_FTR_NODSISRALIGN) +  #ifdef __powerpc64__  #ifdef CONFIG_PPC_BOOK3E -#define CPU_FTRS_POSSIBLE	(CPU_FTRS_E5500) +#define CPU_FTRS_POSSIBLE	(CPU_FTRS_E5500 | CPU_FTRS_A2)  #else  #define CPU_FTRS_POSSIBLE	\  	    (CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 |	\  	    CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_POWER6 |	\  	    CPU_FTRS_POWER7 | CPU_FTRS_CELL | CPU_FTRS_PA6T |		\ -	    CPU_FTR_1T_SEGMENT | CPU_FTR_VSX) +	    CPU_FTR_VSX)  #endif  #else  enum { @@ -487,7 +488,7 @@ enum {  #ifdef __powerpc64__  #ifdef CONFIG_PPC_BOOK3E -#define CPU_FTRS_ALWAYS		(CPU_FTRS_E5500) +#define CPU_FTRS_ALWAYS		(CPU_FTRS_E5500 & CPU_FTRS_A2)  #else  #define CPU_FTRS_ALWAYS		\  	    (CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 &	\  |