diff options
Diffstat (limited to 'arch/mips/include/asm/mach-bcm63xx')
| -rw-r--r-- | arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h | 2 | ||||
| -rw-r--r-- | arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 13 | 
2 files changed, 12 insertions, 3 deletions
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h index 7d98dbe5d4b..c9bae136260 100644 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h @@ -9,6 +9,8 @@ int __init bcm63xx_spi_register(void);  struct bcm63xx_spi_pdata {  	unsigned int	fifo_size; +	unsigned int	msg_type_shift; +	unsigned int	msg_ctl_width;  	int		bus_num;  	int		num_chipselect;  	u32		speed_hz; diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h index 4ccc2a748af..61f2a2a5099 100644 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h @@ -1054,7 +1054,8 @@  #define SPI_6338_FILL_BYTE		0x07  #define SPI_6338_MSG_TAIL		0x09  #define SPI_6338_RX_TAIL		0x0b -#define SPI_6338_MSG_CTL		0x40 +#define SPI_6338_MSG_CTL		0x40	/* 8-bits register */ +#define SPI_6338_MSG_CTL_WIDTH		8  #define SPI_6338_MSG_DATA		0x41  #define SPI_6338_MSG_DATA_SIZE		0x3f  #define SPI_6338_RX_DATA		0x80 @@ -1070,7 +1071,8 @@  #define SPI_6348_FILL_BYTE		0x07  #define SPI_6348_MSG_TAIL		0x09  #define SPI_6348_RX_TAIL		0x0b -#define SPI_6348_MSG_CTL		0x40 +#define SPI_6348_MSG_CTL		0x40	/* 8-bits register */ +#define SPI_6348_MSG_CTL_WIDTH		8  #define SPI_6348_MSG_DATA		0x41  #define SPI_6348_MSG_DATA_SIZE		0x3f  #define SPI_6348_RX_DATA		0x80 @@ -1078,6 +1080,7 @@  /* BCM 6358 SPI core */  #define SPI_6358_MSG_CTL		0x00	/* 16-bits register */ +#define SPI_6358_MSG_CTL_WIDTH		16  #define SPI_6358_MSG_DATA		0x02  #define SPI_6358_MSG_DATA_SIZE		0x21e  #define SPI_6358_RX_DATA		0x400 @@ -1094,6 +1097,7 @@  /* BCM 6358 SPI core */  #define SPI_6368_MSG_CTL		0x00	/* 16-bits register */ +#define SPI_6368_MSG_CTL_WIDTH		16  #define SPI_6368_MSG_DATA		0x02  #define SPI_6368_MSG_DATA_SIZE		0x21e  #define SPI_6368_RX_DATA		0x400 @@ -1115,7 +1119,10 @@  #define SPI_HD_W			0x01  #define SPI_HD_R			0x02  #define SPI_BYTE_CNT_SHIFT		0 -#define SPI_MSG_TYPE_SHIFT		14 +#define SPI_6338_MSG_TYPE_SHIFT		6 +#define SPI_6348_MSG_TYPE_SHIFT		6 +#define SPI_6358_MSG_TYPE_SHIFT		14 +#define SPI_6368_MSG_TYPE_SHIFT		14  /* Command */  #define SPI_CMD_NOOP			0x00  |