diff options
Diffstat (limited to 'arch/arm/mm')
| -rw-r--r-- | arch/arm/mm/cache-l2x0.c | 2 | ||||
| -rw-r--r-- | arch/arm/mm/dma-mapping.c | 11 | ||||
| -rw-r--r-- | arch/arm/mm/mmap.c | 23 | 
3 files changed, 17 insertions, 19 deletions
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index 8ac9e9f8479..b1e192ba8c2 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -61,7 +61,7 @@ static inline void cache_sync(void)  {  	void __iomem *base = l2x0_base; -#ifdef CONFIG_ARM_ERRATA_753970 +#ifdef CONFIG_PL310_ERRATA_753970  	/* write to an unmmapped register */  	writel_relaxed(0, base + L2X0_DUMMY_REG);  #else diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c index e4e7f6cba1a..1aa664a1999 100644 --- a/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c @@ -168,7 +168,7 @@ static int __init consistent_init(void)  	pte_t *pte;  	int i = 0;  	unsigned long base = consistent_base; -	unsigned long num_ptes = (CONSISTENT_END - base) >> PGDIR_SHIFT; +	unsigned long num_ptes = (CONSISTENT_END - base) >> PMD_SHIFT;  	consistent_pte = kmalloc(num_ptes * sizeof(pte_t), GFP_KERNEL);  	if (!consistent_pte) { @@ -332,6 +332,15 @@ __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,  	struct page *page;  	void *addr; +	/* +	 * Following is a work-around (a.k.a. hack) to prevent pages +	 * with __GFP_COMP being passed to split_page() which cannot +	 * handle them.  The real problem is that this flag probably +	 * should be 0 on ARM as it is not supported on this +	 * platform; see CONFIG_HUGETLBFS. +	 */ +	gfp &= ~(__GFP_COMP); +  	*handle = ~0;  	size = PAGE_ALIGN(size); diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c index 74be05f3e03..44b628e4d6e 100644 --- a/arch/arm/mm/mmap.c +++ b/arch/arm/mm/mmap.c @@ -9,8 +9,7 @@  #include <linux/io.h>  #include <linux/personality.h>  #include <linux/random.h> -#include <asm/cputype.h> -#include <asm/system.h> +#include <asm/cachetype.h>  #define COLOUR_ALIGN(addr,pgoff)		\  	((((addr)+SHMLBA-1)&~(SHMLBA-1)) +	\ @@ -32,25 +31,15 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr,  	struct mm_struct *mm = current->mm;  	struct vm_area_struct *vma;  	unsigned long start_addr; -#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) -	unsigned int cache_type; -	int do_align = 0, aliasing = 0; +	int do_align = 0; +	int aliasing = cache_is_vipt_aliasing();  	/*  	 * We only need to do colour alignment if either the I or D -	 * caches alias.  This is indicated by bits 9 and 21 of the -	 * cache type register. +	 * caches alias.  	 */ -	cache_type = read_cpuid_cachetype(); -	if (cache_type != read_cpuid_id()) { -		aliasing = (cache_type | cache_type >> 12) & (1 << 11); -		if (aliasing) -			do_align = filp || flags & MAP_SHARED; -	} -#else -#define do_align 0 -#define aliasing 0 -#endif +	if (aliasing) +		do_align = filp || (flags & MAP_SHARED);  	/*  	 * We enforce the MAP_FIXED case.  |