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-rw-r--r--arch/arm/mach-omap2/Kconfig29
-rw-r--r--arch/arm/mach-omap2/board-omap3h1-bluetooth.c27
-rw-r--r--arch/arm/mach-omap2/board-omap3h1.c88
-rw-r--r--arch/arm/mach-omap2/serial.c1
4 files changed, 120 insertions, 25 deletions
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index c3fdbc0f08a..2793feafaae 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -216,7 +216,7 @@ config MACH_OMAP3_H1
choice
prompt "Olio H1B build version"
- default MACH_OMAP3_H1_EVT2
+ default MACH_OMAP3_H1_PV2
config MACH_OMAP3_H1_EVT1
bool "EVT1 Build of the H1 board"
@@ -231,9 +231,32 @@ config MACH_OMAP3_H1_DVT1
depends on MACH_OMAP3_H1
config MACH_OMAP3_H1_DVT2
- bool "DVT2 Build of the H1 board"
- depends on MACH_OMAP3_H1
+ bool "DVT2 Build of the H1 board"
+ depends on MACH_OMAP3_H1
+
+config MACH_OMAP3_H1_PV
+ bool "PV Build of the H1 board"
+ depends on MACH_OMAP3_H1
+endchoice
+
+choice
+ prompt "Olio H1B PV build version"
+
+config MACH_OMAP3_H1_PV1
+ bool "PV Board with Invensense accelerometer."
+ depends on MACH_OMAP3_H1_PV
+ help
+ This is our first PV board, with Invensense accelerometer. Hopefully
+ it'll be extinct soon. Don't forget to add the invensense driver to
+ the kernel as well.
+config MACH_OMAP3_H1_PV2
+ bool "PV Board with ST accelerometer."
+ depends on MACH_OMAP3_H1_PV
+ help
+ This is the better PV board, with a more capable accelerometer from ST.
+ Might be our last board! Don't forget to configure the accelerometer in
+ the kernel as well.
endchoice
config MACH_DEVKIT8000
diff --git a/arch/arm/mach-omap2/board-omap3h1-bluetooth.c b/arch/arm/mach-omap2/board-omap3h1-bluetooth.c
index 323ec99ac6b..84108a79258 100644
--- a/arch/arm/mach-omap2/board-omap3h1-bluetooth.c
+++ b/arch/arm/mach-omap2/board-omap3h1-bluetooth.c
@@ -36,16 +36,19 @@
#include <linux/debugfs.h>
#include <linux/seq_file.h>
#include <asm/mach-types.h>
+#include <linux/platform_data/serial-omap.h>
#include "serial.h"
#include "board-omap3h1.h"
#include <linux/regulator/driver.h>
static void update_host_wake_locked(int);
+#define BT_RESET_GPIO 179
#define BT_REG_GPIO 180
#define BT_RESET_GPIO 179
#define BT_WAKE_GPIO 93
#define BT_HOST_WAKE_GPIO 11
+#define UART_PORT 1
static struct rfkill *bt_rfkill;
static struct regulator *clk32ksys_reg;
@@ -76,13 +79,14 @@ static int bcm20702_bt_rfkill_set_power(void *data, bool blocked)
gpio_set_value(BT_RESET_GPIO, 1);
gpio_set_value(BT_REG_GPIO, 1);
+ gpio_set_value(BT_RESET_GPIO, 1);
} else {
// Chip won't toggle host_wake after reset. Make sure
// we don't hold the wake_lock until chip wakes up again.
update_host_wake_locked(0);
-
- gpio_set_value(BT_RESET_GPIO, 0);
+
+ gpio_set_value(BT_RESET_GPIO, 0);
gpio_set_value(BT_REG_GPIO, 0);
if (clk32ksys_reg && bt_enabled)
regulator_disable(clk32ksys_reg);
@@ -104,13 +108,13 @@ static void set_wake_locked(int wake)
if (!wake)
wake_unlock(&bt_lpm.wake_lock);
- //if (!wake_uart_enabled && wake)
- //omap_uart_enable(2);
+ if (!wake_uart_enabled && wake)
+ omap_serial_ext_uart_enable(UART_PORT);
gpio_set_value(BT_WAKE_GPIO, wake);
- //if (wake_uart_enabled && !wake)
- //omap_uart_disable(2);
+ if (wake_uart_enabled && !wake)
+ omap_serial_ext_uart_disable(UART_PORT);
wake_uart_enabled = wake;
}
@@ -146,11 +150,11 @@ static void update_host_wake_locked(int host_wake)
if (host_wake) {
wake_lock(&bt_lpm.wake_lock);
if (!host_wake_uart_enabled) {
- //omap_uart_enable(2);
+ omap_serial_ext_uart_enable(UART_PORT);
}
} else {
if (host_wake_uart_enabled) {
- //omap_uart_disable(2);
+ omap_serial_ext_uart_disable(UART_PORT);
}
// Take a timed wakelock, so that upper layers can take it.
// The chipset deasserts the hostwake lock, when there is no
@@ -259,15 +263,16 @@ static int bcm20702_bluetooth_probe(struct platform_device *pdev)
int rc = 0;
int ret = 0;
- rc = gpio_request(BT_RESET_GPIO, "bcm20702_nreset_gpip");
+ rc = gpio_request(BT_RESET_GPIO, "bcm20702_nreset_gpip");
+
if (unlikely(rc)) {
return rc;
}
rc = gpio_request(BT_REG_GPIO, "bcm20702_nshutdown_gpio");
if (unlikely(rc)) {
- gpio_free(BT_RESET_GPIO);
- return rc;
+ gpio_free(BT_RESET_GPIO);
+ return rc;
}
clk32ksys_reg = regulator_get(0, "clk32ksys");
diff --git a/arch/arm/mach-omap2/board-omap3h1.c b/arch/arm/mach-omap2/board-omap3h1.c
index 05dadc33c0f..0d3214c4150 100644
--- a/arch/arm/mach-omap2/board-omap3h1.c
+++ b/arch/arm/mach-omap2/board-omap3h1.c
@@ -82,7 +82,7 @@
#define DEFAULT_RXDMA_BUFSIZE 4096 /* RX DMA buffer size */
#define DEFAULT_RXDMA_TIMEOUT (3 * HZ)/* RX DMA timeout (jiffies) */
-#if defined(CONFIG_MACH_OMAP3_H1_DVT1) || defined(CONFIG_MACH_OMAP3_H1_DVT2)
+#if defined(CONFIG_MACH_OMAP3_H1_DVT1) || defined(CONFIG_MACH_OMAP3_H1_DVT2) || defined (CONFIG_MACH_OMAP3_H1_PV)
#define LCD_RESET_GPIO 94
#else
#define LCD_RESET_GPIO 122
@@ -185,6 +185,7 @@ static int __init omap3h1_spi_init(void) {
* (0 means VLogic, which I'm not sure what it is).
*/
+#ifndef CONFIG_MACH_OMAP3_H1_PV2
static struct mpu_platform_data mpu_data = {
.int_config = 0x00,
.level_shifter = 1,
@@ -192,6 +193,7 @@ static struct mpu_platform_data mpu_data = {
-1, 0, 0,
0, 0, 1 },
};
+#endif
static struct lm3530_platform_data omap3h1_backlight_platform_data = {
.mode = LM3530_BL_MODE_MANUAL,
@@ -267,16 +269,17 @@ static struct platform_device nop_phy_device = {
static struct i2c_board_info __initdata omap3h1_i2c1_board_info[] = {
{
},
-#ifdef CONFIG_MACH_OMAP3_H1_DVT2
+#if defined (CONFIG_MACH_OMAP3_H1_DVT2) || defined (CONFIG_MACH_OMAP3_H1_PV)
};
static struct i2c_board_info __initdata omap3h1_i2c2_board_info[] = {
#endif
{
+#ifdef CONFIG_MACH_OMAP3_H1_PV2
+ I2C_BOARD_INFO("lsm6ds3", 0x6a),
+#else
I2C_BOARD_INFO("mpu6515", 0x68),
- // This is needed for the interrupt wake. IH_GPIO_BASE changed in 3.10
- // .irq = (IH_GPIO_BASE + MPUIRQ_GPIO),
- .irq = 0,
.platform_data = &mpu_data,
+#endif
},
{
/* Backlight */
@@ -299,6 +302,70 @@ static struct i2c_board_info __initdata omap3h1_i2c3_board_info[] = {
},
};
+
+/***************************************************************************
+ * omap_uart data
+ */
+
+/* Some notes:
+ .dma_enabled = false,
+ .dma_rx_buf_size = DEFAULT_RXDMA_BUFSIZE,
+ .dma_rx_poll_rate = DEFAULT_RXDMA_POLLRATE,
+ .dma_rx_timeout = DEFAULT_RXDMA_TIMEOUT,
+ .autosuspend_timeout = DEFAULT_AUTOSUSPEND_DELAY, ( -1 or X ms. )
+
+ .wakelock_timeout - for minnow, this is 150 (BT) or 50 (M4 debug).
+ Can be left out.
+
+ .DTR_* -> can be left out. I can't find anyone using it.
+
+ int DTR_gpio;
+ int DTR_inverted;
+ int DTR_present;
+ bool wakeup_capable;
+
+ bool open_close_pm; - Minnow uses this for c55 only
+ unsigned int rx_trig; Minnow, BT & debug only
+*/
+
+static struct omap_uart_port_info omap_uart_ports[] = {
+ {
+ .dma_enabled = false, /* To specify DMA Mode */
+ .dma_rx_buf_size = DEFAULT_RXDMA_BUFSIZE,
+ .dma_rx_timeout = DEFAULT_RXDMA_TIMEOUT,
+ .dma_rx_poll_rate = DEFAULT_RXDMA_POLLRATE,
+ .autosuspend_timeout = 1000,
+ .wakelock_timeout = 150,
+ .wake_peer = bcm_bt_lpm_exit_lpm_locked,
+ .wakeup_capable = true,
+ },
+ {
+ .dma_enabled = false, /* To specify DMA Mode */
+ .dma_rx_buf_size = DEFAULT_RXDMA_BUFSIZE,
+ .dma_rx_timeout = DEFAULT_RXDMA_TIMEOUT,
+ .dma_rx_poll_rate = DEFAULT_RXDMA_POLLRATE,
+ .autosuspend_timeout = 0,
+ .wakeup_capable = false,
+ },
+ {
+ .dma_enabled = false, /* To specify DMA Mode */
+ .dma_rx_buf_size = DEFAULT_RXDMA_BUFSIZE,
+ .dma_rx_timeout = DEFAULT_RXDMA_TIMEOUT,
+ .dma_rx_poll_rate = DEFAULT_RXDMA_POLLRATE,
+ .autosuspend_timeout = -1,
+ .wakeup_capable = true,
+ },
+ {
+ .dma_enabled = false, /* To specify DMA Mode */
+ .dma_rx_buf_size = DEFAULT_RXDMA_BUFSIZE,
+ .dma_rx_timeout = DEFAULT_RXDMA_TIMEOUT,
+ .dma_rx_poll_rate = DEFAULT_RXDMA_POLLRATE,
+ .autosuspend_timeout = 0,
+ .wakeup_capable = false,
+ },
+};
+
+
/***************************************************************************
* omap3_h1_i2c_init - init the i2c buses
*
@@ -314,16 +381,13 @@ static int __init omap3_h1_i2c_init(void)
*/
gpio_request_one(ATMEL_MXT_GPIO, GPIOF_IN, "atmel_mxt_ts CHG");
- gpio_request_one(MPUIRQ_GPIO, GPIOF_IN, "mpu6515 IRQ pin");
+ gpio_request_one(MPUIRQ_GPIO, GPIOF_IN, "Accl IRQ pin");
acc_irq = gpio_to_irq(MPUIRQ_GPIO);
-#ifdef CONFIG_MACH_OMAP3_H1_DVT2
+#if defined (CONFIG_MACH_OMAP3_H1_DVT2) || defined (CONFIG_MACH_OMAP3_H1_PV)
omap3h1_i2c2_board_info[2].irq = gpio_to_irq(ATMEL_MXT_GPIO);
omap3h1_i2c2_board_info[0].irq = acc_irq;
-
- // ((struct tps65910_board *) (omap3h1_i2c1_board_info[0].platform_data))->irq =
- // gpio_to_irq (TPS_SYS_NIRQ);
#else
omap3h1_i2c1_board_info[3].irq = gpio_to_irq(ATMEL_MXT_GPIO);
omap3h1_i2c1_board_info[1].irq = acc_irq;
@@ -334,7 +398,7 @@ static int __init omap3_h1_i2c_init(void)
/* Register buses */
// omap_register_i2c_bus(1, 400, omap3h1_i2c1_board_info, ARRAY_SIZE(omap3h1_i2c1_board_info));
-#ifdef CONFIG_MACH_OMAP3_H1_DVT2
+#if defined (CONFIG_MACH_OMAP3_H1_DVT2) || defined (CONFIG_MACH_OMAP3_H1_PV)
omap_register_i2c_bus(2, 400, omap3h1_i2c2_board_info, ARRAY_SIZE(omap3h1_i2c2_board_info));
#else
omap_register_i2c_bus(2, 400, NULL, 0);
@@ -372,6 +436,8 @@ static void __init omap3_h1_init(void)
omap3h1_spi_init();
+ omap_serial_board_init(omap_uart_ports);
+
omap_display_init(&omap3h1_dss_data);
usb_bind_phy("musb-hdrc.0.auto", 0, "nop_usb_xceiv"); /* "tusb-usb-h1" */
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index b570d93cbb7..b1f3fb1d396 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -301,6 +301,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata,
omap_up.dma_rx_timeout = info->dma_rx_timeout;
omap_up.dma_rx_poll_rate = info->dma_rx_poll_rate;
omap_up.autosuspend_timeout = info->autosuspend_timeout;
+ omap_up.wake_peer = info->wake_peer;
omap_up.DTR_gpio = info->DTR_gpio;
omap_up.DTR_inverted = info->DTR_inverted;
omap_up.DTR_present = info->DTR_present;