diff options
Diffstat (limited to 'arch/arm/mach-lpc32xx/serial.c')
| -rw-r--r-- | arch/arm/mach-lpc32xx/serial.c | 90 | 
1 files changed, 6 insertions, 84 deletions
diff --git a/arch/arm/mach-lpc32xx/serial.c b/arch/arm/mach-lpc32xx/serial.c index f2735281616..05621a29fba 100644 --- a/arch/arm/mach-lpc32xx/serial.c +++ b/arch/arm/mach-lpc32xx/serial.c @@ -31,59 +31,6 @@  #define LPC32XX_SUART_FIFO_SIZE	64 -/* Standard 8250/16550 compatible serial ports */ -static struct plat_serial8250_port serial_std_platform_data[] = { -#ifdef CONFIG_ARCH_LPC32XX_UART5_SELECT -	{ -		.membase        = io_p2v(LPC32XX_UART5_BASE), -		.mapbase        = LPC32XX_UART5_BASE, -		.irq		= IRQ_LPC32XX_UART_IIR5, -		.uartclk	= LPC32XX_MAIN_OSC_FREQ, -		.regshift	= 2, -		.iotype		= UPIO_MEM32, -		.flags		= UPF_BOOT_AUTOCONF | UPF_BUGGY_UART | -					UPF_SKIP_TEST, -	}, -#endif -#ifdef CONFIG_ARCH_LPC32XX_UART3_SELECT -	{ -		.membase	= io_p2v(LPC32XX_UART3_BASE), -		.mapbase        = LPC32XX_UART3_BASE, -		.irq		= IRQ_LPC32XX_UART_IIR3, -		.uartclk	= LPC32XX_MAIN_OSC_FREQ, -		.regshift	= 2, -		.iotype		= UPIO_MEM32, -		.flags		= UPF_BOOT_AUTOCONF | UPF_BUGGY_UART | -					UPF_SKIP_TEST, -	}, -#endif -#ifdef CONFIG_ARCH_LPC32XX_UART4_SELECT -	{ -		.membase	= io_p2v(LPC32XX_UART4_BASE), -		.mapbase        = LPC32XX_UART4_BASE, -		.irq		= IRQ_LPC32XX_UART_IIR4, -		.uartclk	= LPC32XX_MAIN_OSC_FREQ, -		.regshift	= 2, -		.iotype		= UPIO_MEM32, -		.flags		= UPF_BOOT_AUTOCONF | UPF_BUGGY_UART | -					UPF_SKIP_TEST, -	}, -#endif -#ifdef CONFIG_ARCH_LPC32XX_UART6_SELECT -	{ -		.membase	= io_p2v(LPC32XX_UART6_BASE), -		.mapbase        = LPC32XX_UART6_BASE, -		.irq		= IRQ_LPC32XX_UART_IIR6, -		.uartclk	= LPC32XX_MAIN_OSC_FREQ, -		.regshift	= 2, -		.iotype		= UPIO_MEM32, -		.flags		= UPF_BOOT_AUTOCONF | UPF_BUGGY_UART | -					UPF_SKIP_TEST, -	}, -#endif -	{ }, -}; -  struct uartinit {  	char *uart_ck_name;  	u32 ck_mode_mask; @@ -92,7 +39,6 @@ struct uartinit {  };  static struct uartinit uartinit_data[] __initdata = { -#ifdef CONFIG_ARCH_LPC32XX_UART5_SELECT  	{  		.uart_ck_name = "uart5_ck",  		.ck_mode_mask = @@ -100,8 +46,6 @@ static struct uartinit uartinit_data[] __initdata = {  		.pdiv_clk_reg = LPC32XX_CLKPWR_UART5_CLK_CTRL,  		.mapbase = LPC32XX_UART5_BASE,  	}, -#endif -#ifdef CONFIG_ARCH_LPC32XX_UART3_SELECT  	{  		.uart_ck_name = "uart3_ck",  		.ck_mode_mask = @@ -109,8 +53,6 @@ static struct uartinit uartinit_data[] __initdata = {  		.pdiv_clk_reg = LPC32XX_CLKPWR_UART3_CLK_CTRL,  		.mapbase = LPC32XX_UART3_BASE,  	}, -#endif -#ifdef CONFIG_ARCH_LPC32XX_UART4_SELECT  	{  		.uart_ck_name = "uart4_ck",  		.ck_mode_mask = @@ -118,8 +60,6 @@ static struct uartinit uartinit_data[] __initdata = {  		.pdiv_clk_reg = LPC32XX_CLKPWR_UART4_CLK_CTRL,  		.mapbase = LPC32XX_UART4_BASE,  	}, -#endif -#ifdef CONFIG_ARCH_LPC32XX_UART6_SELECT  	{  		.uart_ck_name = "uart6_ck",  		.ck_mode_mask = @@ -127,19 +67,6 @@ static struct uartinit uartinit_data[] __initdata = {  		.pdiv_clk_reg = LPC32XX_CLKPWR_UART6_CLK_CTRL,  		.mapbase = LPC32XX_UART6_BASE,  	}, -#endif -}; - -static struct platform_device serial_std_platform_device = { -	.name			= "serial8250", -	.id			= 0, -	.dev			= { -		.platform_data	= serial_std_platform_data, -	}, -}; - -static struct platform_device *lpc32xx_serial_devs[] __initdata = { -	&serial_std_platform_device,  };  void __init lpc32xx_serial_init(void) @@ -156,15 +83,8 @@ void __init lpc32xx_serial_init(void)  		clk = clk_get(NULL, uartinit_data[i].uart_ck_name);  		if (!IS_ERR(clk)) {  			clk_enable(clk); -			serial_std_platform_data[i].uartclk = -				clk_get_rate(clk);  		} -		/* Fall back on main osc rate if clock rate return fails */ -		if (serial_std_platform_data[i].uartclk == 0) -			serial_std_platform_data[i].uartclk = -				LPC32XX_MAIN_OSC_FREQ; -  		/* Setup UART clock modes for all UARTs, disable autoclock */  		clkmodes |= uartinit_data[i].ck_mode_mask; @@ -189,7 +109,7 @@ void __init lpc32xx_serial_init(void)  	__raw_writel(clkmodes, LPC32XX_UARTCTL_CLKMODE);  	for (i = 0; i < ARRAY_SIZE(uartinit_data); i++) {  		/* Force a flush of the RX FIFOs to work around a HW bug */ -		puart = serial_std_platform_data[i].mapbase; +		puart = uartinit_data[i].mapbase;  		__raw_writel(0xC1, LPC32XX_UART_IIR_FCR(puart));  		__raw_writel(0x00, LPC32XX_UART_DLL_FIFO(puart));  		j = LPC32XX_SUART_FIFO_SIZE; @@ -198,11 +118,13 @@ void __init lpc32xx_serial_init(void)  		__raw_writel(0, LPC32XX_UART_IIR_FCR(puart));  	} +	/* Disable IrDA pulsing support on UART6 */ +	tmp = __raw_readl(LPC32XX_UARTCTL_CTRL); +	tmp |= LPC32XX_UART_UART6_IRDAMOD_BYPASS; +	__raw_writel(tmp, LPC32XX_UARTCTL_CTRL); +  	/* Disable UART5->USB transparent mode or USB won't work */  	tmp = __raw_readl(LPC32XX_UARTCTL_CTRL);  	tmp &= ~LPC32XX_UART_U5_ROUTE_TO_USB;  	__raw_writel(tmp, LPC32XX_UARTCTL_CTRL); - -	platform_add_devices(lpc32xx_serial_devs, -		ARRAY_SIZE(lpc32xx_serial_devs));  }  |