diff options
Diffstat (limited to 'arch/arm/mach-at91/sam9_smc.c')
| -rw-r--r-- | arch/arm/mach-at91/sam9_smc.c | 76 | 
1 files changed, 71 insertions, 5 deletions
diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c index 8294783b679..99a0a1d2b7d 100644 --- a/arch/arm/mach-at91/sam9_smc.c +++ b/arch/arm/mach-at91/sam9_smc.c @@ -2,6 +2,7 @@   * linux/arch/arm/mach-at91/sam9_smc.c   *   * Copyright (C) 2008 Andrew Victor + * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>   *   * This program is free software; you can redistribute it and/or modify   * it under the terms of the GNU General Public License version 2 as @@ -22,7 +23,22 @@  static void __iomem *smc_base_addr[2]; -static void __init sam9_smc_cs_configure(void __iomem *base, struct sam9_smc_config* config) +static void sam9_smc_cs_write_mode(void __iomem *base, +					struct sam9_smc_config *config) +{ +	__raw_writel(config->mode +		   | AT91_SMC_TDF_(config->tdf_cycles), +		   base + AT91_SMC_MODE); +} + +void sam9_smc_write_mode(int id, int cs, +					struct sam9_smc_config *config) +{ +	sam9_smc_cs_write_mode(AT91_SMC_CS(id, cs), config); +} + +static void sam9_smc_cs_configure(void __iomem *base, +					struct sam9_smc_config *config)  {  	/* Setup register */ @@ -45,16 +61,66 @@ static void __init sam9_smc_cs_configure(void __iomem *base, struct sam9_smc_con  		   base + AT91_SMC_CYCLE);  	/* Mode register */ -	__raw_writel(config->mode -		   | AT91_SMC_TDF_(config->tdf_cycles), -		   base + AT91_SMC_MODE); +	sam9_smc_cs_write_mode(base, config);  } -void __init sam9_smc_configure(int id, int cs, struct sam9_smc_config* config) +void sam9_smc_configure(int id, int cs, +					struct sam9_smc_config *config)  {  	sam9_smc_cs_configure(AT91_SMC_CS(id, cs), config);  } +static void sam9_smc_cs_read_mode(void __iomem *base, +					struct sam9_smc_config *config) +{ +	u32 val = __raw_readl(base + AT91_SMC_MODE); + +	config->mode = (val & ~AT91_SMC_NWECYCLE); +	config->tdf_cycles = (val & AT91_SMC_NWECYCLE) >> 16 ; +} + +void sam9_smc_read_mode(int id, int cs, +					struct sam9_smc_config *config) +{ +	sam9_smc_cs_read_mode(AT91_SMC_CS(id, cs), config); +} + +static void sam9_smc_cs_read(void __iomem *base, +					struct sam9_smc_config *config) +{ +	u32 val; + +	/* Setup register */ +	val = __raw_readl(base + AT91_SMC_SETUP); + +	config->nwe_setup = val & AT91_SMC_NWESETUP; +	config->ncs_write_setup = (val & AT91_SMC_NCS_WRSETUP) >> 8; +	config->nrd_setup = (val & AT91_SMC_NRDSETUP) >> 16; +	config->ncs_read_setup = (val & AT91_SMC_NCS_RDSETUP) >> 24; + +	/* Pulse register */ +	val = __raw_readl(base + AT91_SMC_PULSE); + +	config->nwe_setup = val & AT91_SMC_NWEPULSE; +	config->ncs_write_pulse = (val & AT91_SMC_NCS_WRPULSE) >> 8; +	config->nrd_pulse = (val & AT91_SMC_NRDPULSE) >> 16; +	config->ncs_read_pulse = (val & AT91_SMC_NCS_RDPULSE) >> 24; + +	/* Cycle register */ +	val = __raw_readl(base + AT91_SMC_CYCLE); + +	config->write_cycle = val & AT91_SMC_NWECYCLE; +	config->read_cycle = (val & AT91_SMC_NRDCYCLE) >> 16; + +	/* Mode register */ +	sam9_smc_cs_read_mode(base, config); +} + +void sam9_smc_read(int id, int cs, struct sam9_smc_config *config) +{ +	sam9_smc_cs_read(AT91_SMC_CS(id, cs), config); +} +  void __init at91sam9_ioremap_smc(int id, u32 addr)  {  	if (id > 1) {  |