diff options
| -rw-r--r-- | arch/arm/boot/dts/omap3.dtsi | 36 | ||||
| -rw-r--r-- | arch/arm/boot/dts/omap36xx.dtsi | 14 | ||||
| -rw-r--r-- | arch/arm/boot/dts/omap3_h1.dts | 3 | ||||
| -rw-r--r-- | arch/arm/configs/omap3_h1_defconfig | 2 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/board-omap3h1.c | 274 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/sdram-micron-mt29c4g48.h | 63 | ||||
| -rw-r--r-- | drivers/iio/light/Kconfig | 25 | ||||
| -rw-r--r-- | drivers/iio/light/Makefile | 2 | ||||
| -rw-r--r-- | drivers/iio/light/cm3391.c | 784 | ||||
| -rw-r--r-- | drivers/regulator/core.c | 13 | ||||
| -rw-r--r-- | drivers/video/omap2/displays/panel-ili9342.c | 8 |
11 files changed, 1104 insertions, 120 deletions
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index a4767484a53..4d45679361b 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -227,26 +227,24 @@ /* <&omap3_pmx_core 26 0xd9 1>, */ /* <&omap3_pmx_core 28 0xc1 4>; */ }; - - /* - uart1: serial@4806a000 { - compatible = "ti,omap3-uart"; - ti,hwmods = "uart1"; - clock-frequency = <48000000>; - }; + /* uart1: serial@4806a000 { */ + /* compatible = "ti,omap3-uart"; */ + /* ti,hwmods = "uart1"; */ + /* clock-frequency = <48000000>; */ + /* }; */ - uart2: serial@4806c000 { - compatible = "ti,omap3-uart"; - ti,hwmods = "uart2"; - clock-frequency = <48000000>; - }; + /* uart2: serial@4806c000 { */ + /* compatible = "ti,omap3-uart"; */ + /* ti,hwmods = "uart2"; */ + /* clock-frequency = <48000000>; */ + /* }; */ - uart3: serial@49020000 { - compatible = "ti,omap3-uart"; - ti,hwmods = "uart3"; - clock-frequency = <48000000>; - };*/ + /* uart3: serial@49020000 { */ + /* compatible = "ti,omap3-uart"; */ + /* ti,hwmods = "uart3"; */ + /* clock-frequency = <48000000>; */ + /* }; */ /* i2c1: i2c@48070000 { @@ -583,8 +581,8 @@ };*/ glbl_prm: glbl_prm@48307250 { - /* - * disabled by default. becasue two required + /* + * disabled by default. because two required * values should be defined in board file */ status = "disabled"; diff --git a/arch/arm/boot/dts/omap36xx.dtsi b/arch/arm/boot/dts/omap36xx.dtsi index 34392dbe1bd..2a25174167c 100644 --- a/arch/arm/boot/dts/omap36xx.dtsi +++ b/arch/arm/boot/dts/omap36xx.dtsi @@ -29,11 +29,11 @@ /* }; */ }; - /* ocp { */ - /* uart4: serial@49042000 { */ - /* compatible = "ti,omap3-uart"; */ - /* ti,hwmods = "uart4"; */ - /* clock-frequency = <48000000>; */ - /* }; */ - /* }; */ + /* ocp { */ + /* uart4: serial@49042000 { */ + /* compatible = "ti,omap3-uart"; */ + /* ti,hwmods = "uart4"; */ + /* clock-frequency = <48000000>; */ + /* }; */ + /* }; */ }; diff --git a/arch/arm/boot/dts/omap3_h1.dts b/arch/arm/boot/dts/omap3_h1.dts index cf07bae80c9..13a34e53ac7 100644 --- a/arch/arm/boot/dts/omap3_h1.dts +++ b/arch/arm/boot/dts/omap3_h1.dts @@ -33,8 +33,6 @@ }; }; - - &vc { ti,i2c-high-speed; ti,i2c-pad-load = <3>; @@ -47,7 +45,6 @@ }; }; - &glbl_prm { status = "ok"; sys_clk = "osc_sys_ck"; diff --git a/arch/arm/configs/omap3_h1_defconfig b/arch/arm/configs/omap3_h1_defconfig index 46d74964197..866a78d904e 100644 --- a/arch/arm/configs/omap3_h1_defconfig +++ b/arch/arm/configs/omap3_h1_defconfig @@ -2494,7 +2494,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # # CONFIG_ADJD_S311 is not set # CONFIG_CM32181 is not set -# CONFIG_CM3391 is not set +CONFIG_CM3391=y # CONFIG_SENSORS_TSL2563 is not set # CONFIG_VCNL4000 is not set diff --git a/arch/arm/mach-omap2/board-omap3h1.c b/arch/arm/mach-omap2/board-omap3h1.c index df2d785e59e..fa9164322c3 100644 --- a/arch/arm/mach-omap2/board-omap3h1.c +++ b/arch/arm/mach-omap2/board-omap3h1.c @@ -51,6 +51,8 @@ #include <video/omapdss.h> #include <video/omap-panel-data.h> #include <linux/platform_data/mtd-nand-omap2.h> +#include <linux/platform_data/serial-omap.h> +#include <linux/interrupt.h> #include <linux/of_irq.h> #include <linux/of_platform.h> @@ -66,6 +68,8 @@ #include "common-board-devices.h" #include "board-omap3h1.h" +#include "sdram-micron-mt29c4g48.h" + #define NAND_CS 0 #define MPUIRQ_GPIO 31 @@ -74,6 +78,10 @@ #define USB_IRQ 124 #define USB_ON_ETK_D7 21 +#define DEFAULT_RXDMA_POLLRATE 1 /* RX DMA polling rate (us) */ +#define DEFAULT_RXDMA_BUFSIZE 4096 /* RX DMA buffer size */ +#define DEFAULT_RXDMA_TIMEOUT (3 * HZ)/* RX DMA timeout (jiffies) */ + #if defined(CONFIG_MACH_OMAP3_H1_DVT1) || defined(CONFIG_MACH_OMAP3_H1_DVT2) #define LCD_RESET_GPIO 94 #else @@ -207,21 +215,24 @@ static struct mxt_platform_data mxt_data = { .irqflags = IRQF_TRIGGER_FALLING, }; +/* static struct platform_device bcm20702_bluetooth_device = { .name = "bcm20702_bluetooth", .id = -1, }; +*/ static struct platform_device omap3h1_dmic_codec = { .name = "dmic-codec", .id = -1, }; - /* --------------------------------------------------------------------------- */ /* USB settings */ + + static struct omap_musb_board_data musb_board_data = { .interface_type = MUSB_INTERFACE_ULPI, .mode = MUSB_OTG, @@ -255,7 +266,7 @@ static struct platform_device nop_phy_device = { static struct regulator_init_data omap3h1_vbat_data = { .constraints.always_on = true, - .constraints.valid_modes_mask = REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY, + .constraints.valid_modes_mask = REGULATOR_MODE_NORMAL, .constraints.valid_ops_mask = REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }; @@ -279,13 +290,12 @@ static struct platform_device omap3h1_vbat = { static struct regulator_init_data tps65910_dummy = { .supply_regulator = "VBAT", - .constraints.always_on = true, + .constraints.always_on = false, .constraints.valid_ops_mask = REGULATOR_CHANGE_STATUS, }; /* --------------------------------------------------------------------------- */ -/* This one is required for the display to work ... makes no sense, but there - * you are. +/* This one is required for the display to work. */ static struct regulator_consumer_supply tps65910_touch3_supply[] = { @@ -343,8 +353,18 @@ static struct regulator_init_data tps65910_vibrator = { .max_uV = 3300000, .valid_modes_mask = REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY, .valid_ops_mask = REGULATOR_CHANGE_MODE, - .always_on = true, + .always_on = false, .apply_uV = true, + + .state_mem = { + .disabled = 1, + }, + .state_disk = { + .disabled = 1, + }, + .state_standby = { + .disabled = 1, + }, }, .num_consumer_supplies = ARRAY_SIZE(tps65910_vibrator_supply), .consumer_supplies = tps65910_vibrator_supply, @@ -371,7 +391,7 @@ static struct regulator_init_data tps65910_3v3 = { .valid_modes_mask = REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY, .valid_ops_mask = REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, - .always_on = true, + .always_on = false, .apply_uV = true, .state_mem = { @@ -393,7 +413,7 @@ static struct regulator_init_data tps65910_3v3 = { * USB also depends on this, so if you want to transfer files it has to be * always on. * NAND flash and UART3 (which we don't use) requires it - * as well. + * as well. And the i2c bus, and lots of other stuff. * * Setting always_on to "false" resulted in almost no power savings, at * least in the current setting. @@ -410,34 +430,16 @@ static struct regulator_init_data tps65910_1v8 = { .max_uV = 1800000, .valid_modes_mask = REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY, .valid_ops_mask = REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, - .always_on = true, + .always_on = false, .apply_uV = true, - - .state_mem = { - .uV = 0, - .mode = REGULATOR_MODE_STANDBY, - .enabled = 1, - }, - .state_disk = { - .uV = 0, - .mode = REGULATOR_MODE_STANDBY, - .enabled = 1, - }, - .state_standby = { - .uV = 0, - .mode = REGULATOR_MODE_STANDBY, - .enabled = 1, - }, - }, .num_consumer_supplies = ARRAY_SIZE(tps65910_1v8_supply), .consumer_supplies = tps65910_1v8_supply, }; /* --------------------------------------------------------------------------- */ -/* This isn't actually used, but the wires are required by the processor / - * PMIC. I should be able to set it to constant standby mode (and maybe - * also some sort of off setting?). +/* There's no driver explicitly using this one, but it goes to VDDA_DPLL_PER + * on the OMAP chip. So it's used internally by the DPLL devices in PER, I think. */ static struct regulator_consumer_supply tps65910_vpll_supply[] = { @@ -460,12 +462,7 @@ static struct regulator_init_data tps65910_vpll = { /* --------------------------------------------------------------------------- */ -/* If this one isn't "always on", the display doesn't come up right. - * Maybe the power code should be in the panel part of the driver, rather than - * the SPI? But then again, the SPI part is what needs a power cycle ... tricky! - * - * OK this is weird. The other touch rail (3.3) seems to be gating the display. - * What's going on? Maybe the spi is on the wrong rail? +/* Touch power supply part 2. */ static struct regulator_consumer_supply tps65910_touch_supply[] = { @@ -483,15 +480,17 @@ static struct regulator_init_data tps65910_touch = { .apply_uV = true, .state_mem = { - .uV = 0, + .uV = 1, .mode = REGULATOR_MODE_STANDBY, .disabled = 1, }, .state_disk = { + .uV = 1, .mode = REGULATOR_MODE_STANDBY, .disabled = 1, }, .state_standby = { + .uV = 1, .mode = REGULATOR_MODE_STANDBY, .disabled = 1, }, @@ -507,6 +506,9 @@ static struct regulator_init_data tps65910_touch = { /* This one only works if 'always_on' is set to true. Do I need to do something * special otherwise to turn it on? Maybe the driver doesn't enable it. + * + * The accelerometer driver isn't using regulators properly, hence this needs to + * be always on. */ static struct regulator_consumer_supply tps65910_accel_supply[] = { @@ -524,12 +526,18 @@ static struct regulator_init_data tps65910_accel = { .apply_uV = true, .state_mem = { + .uV = 1, + .mode = REGULATOR_MODE_STANDBY, .disabled = 1, }, .state_disk = { + .uV = 1, + .mode = REGULATOR_MODE_STANDBY, .disabled = 1, }, .state_standby = { + .uV = 1, + .mode = REGULATOR_MODE_STANDBY, .disabled = 1, }, }, @@ -538,8 +546,7 @@ static struct regulator_init_data tps65910_accel = { }; /* --------------------------------------------------------------------------- */ -/* This one isn't pulled on by the CPU ... wrong supply name ? - * Also, the TWL code does NOT have always on set. +/* Supplies the MPU PD and friends. */ static struct regulator_consumer_supply tps65910_vdd1_supply[] = { @@ -552,9 +559,25 @@ static struct regulator_init_data tps65910_vdd1 = { .name = "vdd_mpu_iva", .min_uV = 900000, .max_uV = 1350000, - .valid_modes_mask = REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE, - .always_on = true, + .valid_modes_mask = REGULATOR_MODE_NORMAL, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .always_on = false, + + .state_mem = { + .uV = 1, + .mode = REGULATOR_MODE_STANDBY, + .disabled = 1, + }, + .state_disk = { + .uV = 1, + .mode = REGULATOR_MODE_STANDBY, + .disabled = 1, + }, + .state_standby = { + .uV = 1, + .mode = REGULATOR_MODE_STANDBY, + .disabled = 1, + }, }, .num_consumer_supplies = ARRAY_SIZE(tps65910_vdd1_supply), @@ -566,7 +589,7 @@ static struct regulator_init_data tps65910_vdd1 = { */ static struct regulator_consumer_supply tps65910_vdd2_supply[] = { - REGULATOR_SUPPLY("vcc", "l3_main.0"), + REGULATOR_SUPPLY("vdd_core", "l3_main.0"), }; static struct regulator_init_data tps65910_vdd2 = { @@ -575,11 +598,27 @@ static struct regulator_init_data tps65910_vdd2 = { .name = "vdd_core", .min_uV = 900000, .max_uV = 1200000, - .valid_modes_mask = REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE, - .always_on = true, - }, + .valid_modes_mask = REGULATOR_MODE_NORMAL, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .always_on = false, + .state_mem = { + .uV = 1, + .mode = REGULATOR_MODE_STANDBY, + .disabled = 1, + }, + .state_disk = { + .uV = 1, + .mode = REGULATOR_MODE_STANDBY, + .disabled = 1, + }, + .state_standby = { + .uV = 1, + .mode = REGULATOR_MODE_STANDBY, + .disabled = 1, + }, + }, + .num_consumer_supplies = ARRAY_SIZE(tps65910_vdd2_supply), .consumer_supplies = tps65910_vdd2_supply, }; @@ -594,13 +633,13 @@ static struct regulator_init_data tps65910_vdd2 = { * boot, touch not working when up). */ -/* +/* static struct tps65910_sleep_keepon_data olio_slp_keepon = { - .therm_keepon = 1, - .clkout32k_keepon = 1, + .therm_keepon = 0, + .clkout32k_keepon = 0, .i2chs_keepon = 1, -}; - */ + };*/ + static struct tps65910_board omap3h1_tps65910_pdata = { @@ -721,31 +760,31 @@ static struct i2c_board_info __initdata omap3h1_i2c1_board_info[] = { }; static struct i2c_board_info __initdata omap3h1_i2c2_board_info[] = { #endif - { - I2C_BOARD_INFO("mpu6515", 0x68), - // This is needed for the interrupt wake. IH_GPIO_BASE changed in 3.10 - // .irq = (IH_GPIO_BASE + MPUIRQ_GPIO), - .platform_data = &mpu_data, - }, - { - /* Backlight */ - I2C_BOARD_INFO("lm3530-led", 0x38), - .platform_data = &omap3h1_backlight_platform_data, - }, - { - I2C_BOARD_INFO("mXT224", 0x4a), - .platform_data = &mxt_data, - }, - { - I2C_BOARD_INFO("cm32181", 0x10), - }, + { + I2C_BOARD_INFO("mpu6515", 0x68), + // This is needed for the interrupt wake. IH_GPIO_BASE changed in 3.10 + // .irq = (IH_GPIO_BASE + MPUIRQ_GPIO), + .platform_data = &mpu_data, + }, + { + /* Backlight */ + I2C_BOARD_INFO("lm3530-led", 0x38), + .platform_data = &omap3h1_backlight_platform_data, + }, + { + I2C_BOARD_INFO("mXT224", 0x4a), + .platform_data = &mxt_data, + }, + { + I2C_BOARD_INFO("cm3391", 0x10), + }, #ifdef CONFIG_MACH_OMAP3_H1_EVT1 }; static struct i2c_board_info __initdata omap3h1_i2c3_board_info[] = { #endif - { - I2C_BOARD_INFO("bq274xx", 0x55), - }, + { + I2C_BOARD_INFO("bq274xx", 0x55), + }, }; #ifdef ONLY_KEEPING_THIS_STUFF_FOR_NOSTALGIC_REASONS @@ -757,7 +796,6 @@ static struct i2c_board_info __initdata omap3h1_i2c3_board_info[] = { * That PID will then be used when waking the system up. */ - struct dentry * pidfile; #define SIG_OLIO_WAKE 44 // we choose 44 as our signal number (real-time signals are in the range of 33 to 64) @@ -884,7 +922,7 @@ static irqreturn_t acc_irq_handler_thr(int irq, void * omap3h1_d) { */ send_wake_signal(); - wake_lock_timeout (&acc_wake.lock, msecs_to_jiffies (2 * OLIO_ONE_SECOND)); + wake_lock_timeout (&acc_wake.lock, msecs_to_jiffies (20 * OLIO_ONE_SECOND)); previous_double = now; previous = 0; @@ -910,7 +948,9 @@ static int __init omap3_acc_irq_init (int irq, void * dev_id) { irq_set_irq_wake(irq, 1); if (request_threaded_irq (irq, acc_irq_handler, - acc_irq_handler_thr, 0x81, "acc_wake", + acc_irq_handler_thr, + IRQF_SHARED | IRQF_TRIGGER_RISING, + "acc_wake", dev_id)) { printk (KERN_DEBUG "Couldn't register handler for accelerometer IRQ\n"); } @@ -934,6 +974,69 @@ static int __init omap3_wake_init (void) { #endif /* ONLY_KEEPING_THIS_STUFF_FOR_NOSTALGIC_REASONS */ + +/*************************************************************************** + * omap_uart data + */ + +/* Some notes: + .dma_enabled = false, + .dma_rx_buf_size = DEFAULT_RXDMA_BUFSIZE, + .dma_rx_poll_rate = DEFAULT_RXDMA_POLLRATE, + .dma_rx_timeout = DEFAULT_RXDMA_TIMEOUT, + .autosuspend_timeout = DEFAULT_AUTOSUSPEND_DELAY, ( -1 or X ms. ) + + .wakelock_timeout - for minnow, this is 150 (BT) or 50 (M4 debug). + Can be left out. + + .DTR_* -> can be left out. I can't find anyone using it. + + int DTR_gpio; + int DTR_inverted; + int DTR_present; + bool wakeup_capable; + + bool open_close_pm; - Minnow uses this for c55 only + unsigned int rx_trig; Minnow, BT & debug only +*/ + +static struct omap_uart_port_info omap_uart_ports[] = { + { + .dma_enabled = false, /* To specify DMA Mode */ + .dma_rx_buf_size = DEFAULT_RXDMA_BUFSIZE, + .dma_rx_timeout = DEFAULT_RXDMA_TIMEOUT, + .dma_rx_poll_rate = DEFAULT_RXDMA_POLLRATE, + .autosuspend_timeout = 5000, + .wakeup_capable = false, + }, + { + .dma_enabled = false, /* To specify DMA Mode */ + .dma_rx_buf_size = DEFAULT_RXDMA_BUFSIZE, + .dma_rx_timeout = DEFAULT_RXDMA_TIMEOUT, + .dma_rx_poll_rate = DEFAULT_RXDMA_POLLRATE, + .autosuspend_timeout = 5000, + .wakeup_capable = false, + }, + { + .dma_enabled = false, /* To specify DMA Mode */ + .dma_rx_buf_size = DEFAULT_RXDMA_BUFSIZE, + .dma_rx_timeout = DEFAULT_RXDMA_TIMEOUT, + .dma_rx_poll_rate = DEFAULT_RXDMA_POLLRATE, + .autosuspend_timeout = -1, + .wakelock_timeout = 10000, + .wakeup_capable = true, + }, + { + .dma_enabled = false, /* To specify DMA Mode */ + .dma_rx_buf_size = DEFAULT_RXDMA_BUFSIZE, + .dma_rx_timeout = DEFAULT_RXDMA_TIMEOUT, + .dma_rx_poll_rate = DEFAULT_RXDMA_POLLRATE, + .autosuspend_timeout = 5000, + .wakeup_capable = false, + }, +}; + + /*************************************************************************** * DEVICE TREE STUFF * @@ -1000,7 +1103,7 @@ static int __init omap3_h1_i2c_init(void) static struct platform_device *omap3h1_devices[] __initdata = { &omap3h1_vbat, - &bcm20702_bluetooth_device, + // &bcm20702_bluetooth_device, &nop_phy_device, &omap3h1_dmic_codec, }; @@ -1065,7 +1168,7 @@ static struct omap_board_mux board_mux[] __initdata = { OMAP3_MUX(JTAG_EMU1, (OMAP_MUX_MODE4 | OMAP_PIN_INPUT | OMAP_PIN_OFF_WAKEUPENABLE)), - + /* USB on */ OMAP3_MUX(ETK_D7, (OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT)), @@ -1076,8 +1179,6 @@ static struct omap_board_mux board_mux[] __initdata = { }; #endif - - static void __init omap3_h1_init(void) { /* Read what we can from the device tree */ @@ -1088,7 +1189,7 @@ static void __init omap3_h1_init(void) ARRAY_SIZE(omap3h1_nand_partitions), NAND_CS, NAND_BUSWIDTH_16, NULL); - omap_sdrc_init(NULL, NULL); + omap_sdrc_init(mt29c4g48_sdrc_params, mt29c4g48_sdrc_params); omap3_mux_init(board_mux, OMAP_PACKAGE_CBP); @@ -1101,7 +1202,7 @@ static void __init omap3_h1_init(void) omap3h1_spi_init(); - omap_serial_init(); + omap_serial_board_init(omap_uart_ports); omap_display_init(&omap3h1_dss_data); @@ -1109,15 +1210,22 @@ static void __init omap3_h1_init(void) usb_musb_init(&musb_board_data); + /* #ifdef ONLY_KEEPING_THIS_STUFF_FOR_NOSTALGIC_REASONS */ + /* For handling interrupts from the accelerometer */ /* previous = jiffies; */ /* Init the code that handles wake ups */ - /* omap3_wake_init(); */ + /* + omap3_wake_init(); + + omap3_acc_irq_init(omap3h1_i2c2_board_info[0].irq, (void *) &omap3h1_devices); + */ + + /* #endif ONLY_KEEPING_THIS_STUFF_FOR_NOSTALGIC_REASONS*/ - /* omap3_acc_irq_init(omap3h1_i2c2_board_info[0].irq, (void *) &omap3h1_devices); */ } static const char *omap3_h1_boards_compat[] __initdata = { diff --git a/arch/arm/mach-omap2/sdram-micron-mt29c4g48.h b/arch/arm/mach-omap2/sdram-micron-mt29c4g48.h new file mode 100644 index 00000000000..aa012b090f9 --- /dev/null +++ b/arch/arm/mach-omap2/sdram-micron-mt29c4g48.h @@ -0,0 +1,63 @@ +/* + * SDRC register values for the Micron MT29C4G48MAYAPAKQ-5 + * + * Copyright (C) 2015 Olio Devices + * Copyright (C) 2008 Texas Instruments, Inc. + * Copyright (C) 2008-2009 Nokia Corporation + * + * Mattis Fjallstrom (mattis at oliodevices.com) + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef ARCH_ARM_MACH_OMAP2_SDRAM_MICRON_MT29C4G48 +#define ARCH_ARM_MACH_OMAP2_SDRAM_MICRON_MT29C4G48 + +#include "sdrc.h" + +/* Micron MT29C4G48MAYAPAKQ-5 */ +/* 5ns -> 200MHz */ + + +/* 5.4ns -> 185.185185185185 MHz */ +/* 6ns -> 166.666667 MHz */ +/* 7.5ns -> 133.33333333333 */ + +static struct omap_sdrc_params mt29c4g48_sdrc_params[] = { + [0] = { + .rate = 200000000, + .actim_ctrla = 0x7AE1B4C6, + .actim_ctrlb = 0x00021217, + .rfr_ctrl = 0x0005E601, + .mr = 0x00000034, + }, + [1] = { + .rate = 185185185, + .actim_ctrla = 0x72E1B4C6, + .actim_ctrlb = 0x00021215, + .rfr_ctrl = 0x00057201, + .mr = 0x00000034, + }, + [2] = { + .rate = 166000000, + .actim_ctrla = 0x629DB4C6, + .actim_ctrlb = 0x00011113, + .rfr_ctrl = 0x0004E201, + .mr = 0x00000034, + }, + [3] = { + .rate = 133333333, + .actim_ctrla = 0x5259B485, + .actim_ctrlb = 0x0001110F, + .rfr_ctrl = 0x0003DE01, + .mr = 0x00000034, + }, + [4] = { + .rate = 0, + }, +}; + +#endif diff --git a/drivers/iio/light/Kconfig b/drivers/iio/light/Kconfig index 5ef1a396e0c..e86ccb49d9d 100644 --- a/drivers/iio/light/Kconfig +++ b/drivers/iio/light/Kconfig @@ -32,6 +32,31 @@ config SENSORS_LM3533 changes. The ALS-control output values can be set per zone for the three current output channels. +config CM32181 + tristate "CM32181 driver" + depends on I2C + help + Say Y here if you use cm32181. + + This option enables ambient light sensor using + Capella cm32181 device driver. + + To compile this driver as a module, choose M here: + the module will be called cm32181. + +config CM3391 + tristate "CM3391 driver" + depends on I2C + help + Say Y here if you use cm3391. + + This option enables ambient light sensor using + Capella cm3391 device driver. + + To compile this driver as a module, choose M here: + the module will be called cm3391. + + config SENSORS_TSL2563 tristate "TAOS TSL2560, TSL2561, TSL2562 and TSL2563 ambient light sensors" depends on I2C diff --git a/drivers/iio/light/Makefile b/drivers/iio/light/Makefile index 040d9c75f8e..fdf3b87e1f1 100644 --- a/drivers/iio/light/Makefile +++ b/drivers/iio/light/Makefile @@ -7,3 +7,5 @@ obj-$(CONFIG_SENSORS_LM3533) += lm3533-als.o obj-$(CONFIG_SENSORS_TSL2563) += tsl2563.o obj-$(CONFIG_VCNL4000) += vcnl4000.o obj-$(CONFIG_HID_SENSOR_ALS) += hid-sensor-als.o +obj-$(CONFIG_CM32181) += cm32181.o +obj-$(CONFIG_CM3391) += cm3391.o
\ No newline at end of file diff --git a/drivers/iio/light/cm3391.c b/drivers/iio/light/cm3391.c new file mode 100644 index 00000000000..ed2d84a61fe --- /dev/null +++ b/drivers/iio/light/cm3391.c @@ -0,0 +1,784 @@ +/* + * Copyright (C) 2014-2015 Capella Microsystems Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2, as published + * by the Free Software Foundation. + * + * Special thanks Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> + * help to add ACPI support. + * + */ + +#include <linux/delay.h> +#include <linux/err.h> +#include <linux/i2c.h> +#include <linux/mutex.h> +#include <linux/module.h> +#include <linux/interrupt.h> +#include <linux/regulator/consumer.h> +#include <linux/iio/iio.h> +#include <linux/iio/sysfs.h> +#include <linux/iio/events.h> + +#include <linux/init.h> + +#ifdef CONFIG_ACPI +#include <linux/acpi.h> +#endif /* CONFIG_ACPI */ + +#define OLDAPI + +/* Registers Address */ +#define CM3391_REG_ADDR_CMD 0x00 +#define CM3391_REG_ADDR_TEST 0x01 +#define CM3391_REG_ADDR_WH 0x02 +#define CM3391_REG_ADDR_WL 0x03 +#define CM3391_REG_ADDR_RED 0x08 +#define CM3391_REG_ADDR_ALS 0x09 +#define CM3391_REG_ADDR_BLUE 0x0A +#define CM3391_REG_ADDR_CLEAR 0x0B +#define CM3391_REG_ADDR_ID 0x0C +#define CM3391_REG_ADDR_STATUS 0x0D + +/* Number of Configurable Registers */ +#define CM3391_CONF_REG_NUM 16 + +/* CMD register */ +#define CM3391_CMD_CS_DISABLE BIT(0) +#define CM3391_CMD_CS_INT_EN BIT(8) + +#define CM3391_CMD_CS_PERS_SHIFT 10 +#define CM3391_CMD_CS_PERS_MASK (0x03 << CM3391_CMD_CS_PERS_SHIFT) +#define CM3391_CMD_CS_PERS_DEFAULT (0x01 << CM3391_CMD_CS_PERS_SHIFT) + +#define CM3391_CMD_CS_IT_SHIFT 4 +#define CM3391_CMD_CS_IT_MASK (0x07 << CM3391_CMD_CS_IT_SHIFT) +#define CM3391_CMD_CS_IT_DEFAULT (0x01 << CM3391_CMD_CS_IT_SHIFT) + +#define CM3391_CMD_CS_HS_SHIFT 3 +#define CM3391_CMD_CS_HS_MASK (0x01 << CM3391_CMD_CS_HS_SHIFT) +#define CM3391_CMD_CS_HS_DEFAULT (0x00 << CM3391_CMD_CS_HS_SHIFT) + +#define CM3391_CMD_DEFAULT (\ + CM3391_CMD_CS_PERS_DEFAULT |\ + CM3391_CMD_CS_IT_DEFAULT |\ + CM3391_CMD_CS_HS_DEFAULT) + +#define CM3391_WH_DEFAULT 0xFFFF +#define CM3391_WL_DEFAULT 0x0000 + +#define CM3391_CALIBSCALE_DEFAULT 100000 +#define CM3391_CALIBSCALE_RESOLUTION 100000 +#define CM3391_MLUX_PER_LUX 1000 +#define CM3391_THRESHOLD_PERCENT 10 /* 10 percent */ + +#define CM3391_MLUX_PER_BIT_DEFAULT 550 +#define CM3391_MLUX_PER_BIT_BASE_IT 100000 +static const int CM3391_cs_it_bits[] = { 0, 1, 2, 3, 4}; +static const int CM3391_cs_it_values[] = { + 50000, 100000, 200000, 400000, 800000}; + +struct cm3391_cs_info { + u32 id; + int regs_bmp; + int calibscale; + int mlux_per_bit; + int mlux_per_bit_base_it; + const int *cs_it_bits; + const int *cs_it_values; + const int num_cs_it; + int als_raw; +}; + +static struct cm3391_cs_info cm3391_cs_info_default = { + .id = 3391, + .regs_bmp = 0x0F, + .calibscale = CM3391_CALIBSCALE_DEFAULT, + .mlux_per_bit = CM3391_MLUX_PER_BIT_DEFAULT, + .mlux_per_bit_base_it = CM3391_MLUX_PER_BIT_BASE_IT, + .cs_it_bits = CM3391_cs_it_bits, + .cs_it_values = CM3391_cs_it_values, + .num_cs_it = ARRAY_SIZE(CM3391_cs_it_bits), +}; + +struct cm3391_chip { + struct i2c_client *client; + struct mutex lock; + u16 conf_regs[CM3391_CONF_REG_NUM]; + struct cm3391_cs_info *cs_info; +}; + +static int cm3391_get_lux(struct cm3391_chip *chip); +static int cm3391_threshold_update(struct cm3391_chip *chip, int percent); +static int cm3391_read_cs_it(struct cm3391_chip *chip, int *val2); + +/** + * cm3391_interrupt_config() - Enable/Disable CM3391 interrupt + * @chip: pointer of struct cm3391. + * @enable: 0 to disable; otherwise to enable + * + * Config CM3391 interrupt control bit. + * + * Return: 0 for success; otherwise for error code. + */ +static int cm3391_interrupt_config(struct cm3391_chip *chip, int enable) +{ + struct i2c_client *client = chip->client; + struct cm3391_cs_info *cs_info = chip->cs_info; + int status; + + if (!cs_info) + return -ENODEV; + + /* Force to clean interrupt */ + status = i2c_smbus_read_word_data(client, + CM3391_REG_ADDR_STATUS); + if (status < 0) + return -ENODEV; + + if (enable) + chip->conf_regs[CM3391_REG_ADDR_CMD] |= + CM3391_CMD_CS_INT_EN; + else + chip->conf_regs[CM3391_REG_ADDR_CMD] &= + ~CM3391_CMD_CS_INT_EN; + + status = i2c_smbus_write_word_data(client, CM3391_REG_ADDR_CMD, + chip->conf_regs[CM3391_REG_ADDR_CMD]); + + if (status < 0) + return -ENODEV; + + return status; +} + +#ifdef CONFIG_ACPI +/** + * cm3391_acpi_get_cpm_info() - Get CPM object from ACPI + * @client pointer of struct i2c_client. + * @obj_name pointer of ACPI object name. + * @count maximum size of return array. + * @vals pointer of array for return elements. + * + * Convert ACPI CPM table to array. Special thanks Srinivas Pandruvada's + * help to implement this routine. + * + * Return: -ENODEV for fail. Otherwise is number of elements. + */ +static int cm3391_acpi_get_cpm_info(struct i2c_client *client, char *obj_name, + int count, u64 *vals) +{ + acpi_handle handle; + struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL}; + int i; + acpi_status status; + union acpi_object *cpm; + + handle = ACPI_HANDLE(&client->dev); + if (!handle) + return -ENODEV; + + status = acpi_evaluate_object(handle, obj_name, NULL, &buffer); + if (ACPI_FAILURE(status)) { + dev_err(&client->dev, "object %s not found\n", obj_name); + return -ENODEV; + } + + cpm = buffer.pointer; + for (i = 0; i < cpm->package.count && i < count; ++i) { + union acpi_object *elem; + elem = &(cpm->package.elements[i]); + vals[i] = elem->integer.value; + } + + kfree(buffer.pointer); + + return cpm->package.count; +} +#endif /* CONFIG_ACPI */ + +/** + * cm3391_reg_init() - Initialize CM3391 registers + * @chip: pointer of struct cm3391. + * + * Initialize CM3391 color sensor register to default values. + * + Return: 0 for success; otherwise for error code. + */ +static int cm3391_reg_init(struct cm3391_chip *chip) +{ + struct i2c_client *client = chip->client; + int i; + s32 ret; + struct cm3391_cs_info *cs_info; +#ifdef CONFIG_ACPI + int cpm_elem_count; + u64 cpm_elems[20]; +#endif /* CONFIG_ACPI */ + + + /* Default device */ + cs_info = chip->cs_info = &cm3391_cs_info_default; + chip->conf_regs[CM3391_REG_ADDR_CMD] = CM3391_CMD_DEFAULT; + chip->conf_regs[CM3391_REG_ADDR_WH] = CM3391_WH_DEFAULT; + chip->conf_regs[CM3391_REG_ADDR_WL] = CM3391_WL_DEFAULT; + + /* Disable interrupt */ + cm3391_interrupt_config(chip, 0); + + /* Disable Test Mode */ + i2c_smbus_write_word_data(client, CM3391_REG_ADDR_TEST, 0x0000); + + /* Disable device */ + i2c_smbus_write_word_data(client, CM3391_REG_ADDR_CMD, + CM3391_CMD_CS_DISABLE); + + /* Identify device */ + ret = i2c_smbus_read_word_data(client, CM3391_REG_ADDR_ID); + if (ret < 0) + return ret; + + if ((ret & 0xFF) != 0x91) + return -ENODEV; + +#ifdef CONFIG_ACPI +#error ACPI is enabled, strange! OLIO MFJ + + if (ACPI_HANDLE(&client->dev)) { + /* Load from ACPI */ + cpm_elem_count = cm3391_acpi_get_cpm_info(client, "CPM0", + ARRAY_SIZE(cpm_elems), + cpm_elems); + if (cpm_elem_count > 0) { + int header_num = 3; + int reg_num = cpm_elem_count - header_num; + + cs_info->id = cpm_elems[0]; + cs_info->regs_bmp = cpm_elems[2]; + for (i = 0; i < reg_num; i++) + if (cs_info->regs_bmp & (1<<i)) + chip->conf_regs[i] = + cpm_elems[header_num+i]; + } + + cpm_elem_count = cm3391_acpi_get_cpm_info(client, "CPM1", + ARRAY_SIZE(cpm_elems), + cpm_elems); + if (cpm_elem_count > 0) { + cs_info->mlux_per_bit = (int)cpm_elems[0] / 100; + cs_info->calibscale = (int)cpm_elems[1]; + } + } +#endif /* CONFIG_ACPI */ + + /* Force to disable interrupt */ + chip->conf_regs[CM3391_REG_ADDR_CMD] &= ~CM3391_CMD_CS_INT_EN; + + /* Initialize registers */ + for (i = 0; i < CM3391_CONF_REG_NUM; i++) { + if (cs_info->regs_bmp & (1<<i)) { + ret = i2c_smbus_write_word_data(client, i, + chip->conf_regs[i]); + if (ret < 0) + return ret; + } + } + + return 0; +} + +/** + * cm3391_read_cs_it() - Get sensor integration time (ms) + * @chip: pointer of struct cm3391 + * @val2: pointer of int to load the cs_it value. + * + * Report the current integration time in milliseconds. + * + * Return: IIO_VAL_INT_PLUS_MICRO for success, otherwise -EINVAL. + */ +static int cm3391_read_cs_it(struct cm3391_chip *chip, int *val2) +{ + struct cm3391_cs_info *cs_info = chip->cs_info; + u16 cs_it; + int i; + + cs_it = chip->conf_regs[CM3391_REG_ADDR_CMD]; + cs_it &= CM3391_CMD_CS_IT_MASK; + cs_it >>= CM3391_CMD_CS_IT_SHIFT; + for (i = 0; i < cs_info->num_cs_it; i++) { + if (cs_it == cs_info->cs_it_bits[i]) { + *val2 = cs_info->cs_it_values[i]; + return IIO_VAL_INT_PLUS_MICRO; + } + } + + return -EINVAL; +} + +#ifndef OLDAPI +/** + * cm3391_write_cs_it() - Write sensor integration time + * @chip: pointer of struct cm3391. + * @val: integration time in milliseconds. + * + * Convert integration time (ms) to sensor value. + * + * Return: i2c_smbus_write_word_data command return value. + */ +static int cm3391_write_cs_it(struct cm3391_chip *chip, int val) +{ + struct i2c_client *client = chip->client; + struct cm3391_cs_info *cs_info = chip->cs_info; + u16 cs_it; + int ret, i; + + for (i = 0; i < cs_info->num_cs_it; i++) + if (val <= cs_info->cs_it_values[i]) + break; + if (i >= cs_info->num_cs_it) + i = cs_info->num_cs_it - 1; + + cs_it = cs_info->cs_it_bits[i]; + cs_it <<= CM3391_CMD_CS_IT_SHIFT; + + mutex_lock(&chip->lock); + chip->conf_regs[CM3391_REG_ADDR_CMD] &= + ~CM3391_CMD_CS_IT_MASK; + chip->conf_regs[CM3391_REG_ADDR_CMD] |= + cs_it; + ret = i2c_smbus_write_word_data(client, CM3391_REG_ADDR_CMD, + chip->conf_regs[CM3391_REG_ADDR_CMD]); + mutex_unlock(&chip->lock); + + return ret; +} +#endif /* !OLDAPI */ + +/** + * cm3391_get_lux() - report current lux value + * @chip: pointer of struct cm3391. + * + * Convert sensor raw data to lux. It depends on integration + * time and calibscale variable. + * + * Return: Positive value is lux, otherwise is error code. + */ +static int cm3391_get_lux(struct cm3391_chip *chip) +{ + struct i2c_client *client = chip->client; + struct cm3391_cs_info *cs_info = chip->cs_info; + int ret; + int cs_it; + u64 tmp; + + /* Calculate mlux per bit based on cs_it */ + ret = cm3391_read_cs_it(chip, &cs_it); + if (ret < 0) + return -EINVAL; + tmp = (__force u64)cs_info->mlux_per_bit; + tmp *= cs_info->mlux_per_bit_base_it; + tmp = div_u64(tmp, cs_it); + + /* Get als_raw */ + if (!(chip->conf_regs[CM3391_REG_ADDR_CMD] & CM3391_CMD_CS_INT_EN)) + cs_info->als_raw = i2c_smbus_read_word_data( + client, + CM3391_REG_ADDR_ALS); + if (cs_info->als_raw < 0) + return cs_info->als_raw; + + tmp *= cs_info->als_raw; + tmp *= cs_info->calibscale; + tmp = div_u64(tmp, CM3391_CALIBSCALE_RESOLUTION); + tmp = div_u64(tmp, CM3391_MLUX_PER_LUX); + + if (tmp > 0xFFFF) + tmp = 0xFFFF; + + return (int)tmp; +} + +static int cm3391_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2, long mask) +{ + struct cm3391_chip *chip = iio_priv(indio_dev); + struct cm3391_cs_info *cs_info = chip->cs_info; + int ret; + + switch (mask) { + case IIO_CHAN_INFO_RAW: + ret = i2c_smbus_read_word_data(chip->client, chan->address); + if (ret < 0) { + return ret; + } + *val = ret; + return IIO_VAL_INT; + case IIO_CHAN_INFO_PROCESSED: + ret = cm3391_get_lux(chip); + if (ret < 0) + return ret; + *val = ret; + return IIO_VAL_INT; + case IIO_CHAN_INFO_CALIBSCALE: + *val = cs_info->calibscale; + return IIO_VAL_INT; +#ifndef OLDAPI + case IIO_CHAN_INFO_INT_TIME: + *val = 0; + ret = cm3391_read_cs_it(chip, val2); + return ret; +#endif /* !OLDAPI */ + } + + return -EINVAL; +} + +static int cm3391_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int val, int val2, long mask) +{ + struct cm3391_chip *chip = iio_priv(indio_dev); + struct cm3391_cs_info *cs_info = chip->cs_info; +#ifndef OLDAPI + long ms; +#endif /* !OLDAPI */ + + switch (mask) { + case IIO_CHAN_INFO_CALIBSCALE: + cs_info->calibscale = val; + return val; +#ifndef OLDAPI + case IIO_CHAN_INFO_INT_TIME: + ms = val * 1000000 + val2; + return cm3391_write_cs_it(chip, (int)ms); +#endif /* !OLDAPI */ + } + + return -EINVAL; +} + +/** + * cm3391_get_it_available() - Get available IT value + * @dev: pointer of struct device. + * @attr: pointer of struct device_attribute. + * @buf: pointer of return string buffer. + * + * Display the available integration time in milliseconds. + * + * Return: string length. + */ +static ssize_t cm3391_get_it_available(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct cm3391_chip *chip = iio_priv(dev_to_iio_dev(dev)); + struct cm3391_cs_info *cs_info = chip->cs_info; + int i, len; + + for (i = 0, len = 0; i < cs_info->num_cs_it; i++) + len += scnprintf(buf + len, PAGE_SIZE - len, "%u.%06u ", + cs_info->cs_it_values[i]/1000000, + cs_info->cs_it_values[i]%1000000); + return len + scnprintf(buf + len, PAGE_SIZE - len, "\n"); +} + +/** + * cm3391_threshold_update() - Update the threshold registers. + * @chip: pointer of struct cm3391_chip. + * @percent: +/- percent. + * + * Based on the current ALS value, update the hi and low threshold registers. + * + * Return: 0 for success; otherwise for error code. + */ +static int cm3391_threshold_update(struct cm3391_chip *chip, int percent) +{ + struct i2c_client *client = chip->client; + struct cm3391_cs_info *cs_info = chip->cs_info; + int ret; + int wh, wl; + + ret = cs_info->als_raw = i2c_smbus_read_word_data(client, + CM3391_REG_ADDR_ALS); + if (ret < 0) + return ret; + + wh = wl = ret; + ret *= percent; + ret /= 100; + if (ret < 1) + ret = 1; + wh += ret; + wl -= ret; + if (wh > 65535) + wh = 65535; + if (wl < 0) + wl = 0; + + chip->conf_regs[CM3391_REG_ADDR_WH] = wh; + ret = i2c_smbus_write_word_data( + client, + CM3391_REG_ADDR_WH, + chip->conf_regs[CM3391_REG_ADDR_WH]); + if (ret < 0) + return ret; + + chip->conf_regs[CM3391_REG_ADDR_WL] = wl; + ret = i2c_smbus_write_word_data( + client, + CM3391_REG_ADDR_WL, + chip->conf_regs[CM3391_REG_ADDR_WL]); + + return ret; +} + +/** + * cm3391_event_handler() - Interrupt handling routine. + * @irq: irq number. + * @private: pointer of void. + * + * Clean interrupt and reset threshold registers. + * + * Return: IRQ_HANDLED. + */ +static irqreturn_t cm3391_event_handler(int irq, void *private) +{ + struct iio_dev *dev_info = private; + struct cm3391_chip *chip = iio_priv(dev_info); + int ret; + + mutex_lock(&chip->lock); + + /* Disable interrupt */ + ret = cm3391_interrupt_config(chip, 0); + if (ret < 0) + goto error_handler_unlock; + + /* Update Hi/Lo windows */ + ret = cm3391_threshold_update(chip, CM3391_THRESHOLD_PERCENT); + if (ret < 0) + goto error_handler_unlock; + + /* Enable interrupt */ + cm3391_interrupt_config(chip, 1); + +error_handler_unlock: + mutex_unlock(&chip->lock); + return IRQ_HANDLED; +} + +#ifdef OLDAPI +#define CM3391_COLOR_CHANNEL(_color, _addr) { \ + .type = IIO_INTENSITY, \ + .modified = 1, \ + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ + .channel2 = IIO_MOD_LIGHT_##_color, \ + .address = _addr, \ +} + +static const struct iio_chan_spec cm3391_channels[] = { + { + .type = IIO_LIGHT, + .info_mask_separate = + BIT(IIO_CHAN_INFO_PROCESSED) | + BIT(IIO_CHAN_INFO_CALIBSCALE) + }, + CM3391_COLOR_CHANNEL(RED, CM3391_REG_ADDR_RED), + CM3391_COLOR_CHANNEL(GREEN, CM3391_REG_ADDR_ALS), + CM3391_COLOR_CHANNEL(BLUE, CM3391_REG_ADDR_BLUE), + CM3391_COLOR_CHANNEL(CLEAR, CM3391_REG_ADDR_CLEAR), +}; + +#else +#define CM3391_COLOR_CHANNEL(_color, _addr) { \ + .type = IIO_INTENSITY, \ + .modified = 1, \ + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_INT_TIME), \ + .channel2 = IIO_MOD_LIGHT_##_color, \ + .address = _addr, \ +} + +static const struct iio_chan_spec cm3391_channels[] = { + { + .type = IIO_LIGHT, + .info_mask_separate = + BIT(IIO_CHAN_INFO_PROCESSED) | + BIT(IIO_CHAN_INFO_CALIBSCALE) | + BIT(IIO_CHAN_INFO_INT_TIME), + }, + CM3391_COLOR_CHANNEL(RED, CM3391_REG_ADDR_RED), + CM3391_COLOR_CHANNEL(GREEN, CM3391_REG_ADDR_ALS), + CM3391_COLOR_CHANNEL(BLUE, CM3391_REG_ADDR_BLUE), + CM3391_COLOR_CHANNEL(CLEAR, CM3391_REG_ADDR_CLEAR), +}; +#endif /* !OLDAPI */ + +static IIO_DEVICE_ATTR(in_illuminance_integration_time_available, + S_IRUGO, cm3391_get_it_available, NULL, 0); + +static struct attribute *cm3391_attributes[] = { + &iio_dev_attr_in_illuminance_integration_time_available.dev_attr.attr, + NULL, +}; + +static const struct attribute_group cm3391_attribute_group = { + .attrs = cm3391_attributes +}; + +static const struct iio_info cm3391_info = { + .driver_module = THIS_MODULE, + .read_raw = &cm3391_read_raw, + .write_raw = &cm3391_write_raw, + .attrs = &cm3391_attribute_group, +}; + +static int cm3391_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct cm3391_chip *chip; + struct iio_dev *indio_dev; + int ret; + +#ifdef OLDAPI + indio_dev = iio_device_alloc(sizeof(*chip)); + if (!indio_dev) { + dev_err(&client->dev, "iio_device_alloc fails\n"); + return -ENOMEM; + } +#else + indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip)); + if (!indio_dev) { + dev_err(&client->dev, "devm_iio_device_alloc failed\n"); + return -ENOMEM; + } +#endif /* OLDAPI */ + + chip = iio_priv(indio_dev); + i2c_set_clientdata(client, indio_dev); + chip->client = client; + + mutex_init(&chip->lock); + indio_dev->dev.parent = &client->dev; + indio_dev->channels = cm3391_channels; + indio_dev->num_channels = ARRAY_SIZE(cm3391_channels); + indio_dev->info = &cm3391_info; + if (id && id->name) + indio_dev->name = id->name; + else + indio_dev->name = (char *)dev_name(&client->dev); + indio_dev->channels = cm3391_channels; + indio_dev->num_channels = ARRAY_SIZE(cm3391_channels); + indio_dev->modes = INDIO_DIRECT_MODE; + + ret = cm3391_reg_init(chip); + if (ret) { + dev_err(&client->dev, + "%s: register init failed\n", + __func__); + return ret; + } + + if (client->irq) { + ret = request_threaded_irq(client->irq, + NULL, + cm3391_event_handler, + IRQF_TRIGGER_FALLING | IRQF_ONESHOT, + "cm3391_event", + indio_dev); + + if (ret < 0) { + dev_err(&client->dev, "irq request error %d\n", + -ret); + goto error_disable_int; + } + } + + ret = iio_device_register(indio_dev); + if (ret < 0) { + dev_err(&client->dev, + "%s: regist device failed\n", + __func__); + goto error_free_irq; + } + + if (client->irq) { + ret = cm3391_threshold_update(chip, CM3391_THRESHOLD_PERCENT); + if (ret < 0) + goto error_free_irq; + + ret = cm3391_interrupt_config(chip, 1); + if (ret < 0) + goto error_free_irq; + } + + return 0; + +error_free_irq: + if (client->irq) + free_irq(client->irq, indio_dev); +#ifdef OLDAPI + iio_device_free(indio_dev); +#endif /* OLDAPI */ +error_disable_int: + cm3391_interrupt_config(chip, 0); + + return ret; +} + +static int cm3391_remove(struct i2c_client *client) +{ + struct iio_dev *indio_dev = i2c_get_clientdata(client); + struct cm3391_chip *chip = iio_priv(indio_dev); + + cm3391_interrupt_config(chip, 0); + if (client->irq) + free_irq(client->irq, indio_dev); + iio_device_unregister(indio_dev); +#ifdef OLDAPI + iio_device_free(indio_dev); +#endif /* OLDAPI */ + return 0; +} + +static const struct i2c_device_id cm3391_id[] = { + { "cm3391", 0}, + { } +}; + +MODULE_DEVICE_TABLE(i2c, cm3391_id); + +static const struct of_device_id cm3391_of_match[] = { + { .compatible = "capella,cm3391" }, + { } +}; + +#ifdef CONFIG_ACPI +static const struct acpi_device_id cm3391_acpi_match[] = { + { "CPLM3391", 0}, + {}, +}; + +MODULE_DEVICE_TABLE(acpi, cm3391_acpi_match); +#endif /* CONFIG_ACPI */ + +static struct i2c_driver cm3391_driver = { + .driver = { + .name = "cm3391", +#ifdef CONFIG_ACPI + .acpi_match_table = ACPI_PTR(cm3391_acpi_match), +#endif /* CONFIG_ACPI */ + .of_match_table = of_match_ptr(cm3391_of_match), + .owner = THIS_MODULE, + }, + .id_table = cm3391_id, + .probe = cm3391_probe, + .remove = cm3391_remove, +}; + +module_i2c_driver(cm3391_driver); + +MODULE_AUTHOR("Kevin Tsai <ktsai@capellamicro.com>"); +MODULE_DESCRIPTION("CM3391 color sensor driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c index 815d6df8bd5..7c75ab88f9b 100644 --- a/drivers/regulator/core.c +++ b/drivers/regulator/core.c @@ -3673,8 +3673,9 @@ regulator_register(const struct regulator_desc *regulator_desc, add_dev: /* add consumers devices */ + if (init_data) { - for (i = 0; i < init_data->num_consumer_supplies; i++) { + for (i = 0; i < init_data->num_consumer_supplies; i++) { ret = set_consumer_device_supply(rdev, init_data->consumer_supplies[i].dev_name, init_data->consumer_supplies[i].supply); @@ -3684,13 +3685,14 @@ add_dev: goto unset_supplies; } } - } + } list_add(&rdev->list, ®ulator_list); rdev_init_debugfs(rdev); out: mutex_unlock(®ulator_list_mutex); + return rdev; unset_supplies: @@ -3710,7 +3712,8 @@ wash: clean: kfree(rdev); rdev = ERR_PTR(ret); - goto out; + + goto out; } EXPORT_SYMBOL_GPL(regulator_register); @@ -3980,8 +3983,12 @@ static int __init regulator_init_complete(void) * with DT to provide them just assume that a DT enabled * system has full constraints. */ + +#if 0 + // TODO OLIO: This assumption isn't true for us. Not yet, at least. if (of_have_populated_dt()) has_full_constraints = true; +#endif mutex_lock(®ulator_list_mutex); diff --git a/drivers/video/omap2/displays/panel-ili9342.c b/drivers/video/omap2/displays/panel-ili9342.c index afcf05dfa79..21bcec734d6 100644 --- a/drivers/video/omap2/displays/panel-ili9342.c +++ b/drivers/video/omap2/displays/panel-ili9342.c @@ -268,13 +268,13 @@ static int ili9342_get_recommended_bpp(struct omap_dss_device *dssdev) { */ static int ili9342_disp_suspend (struct device * dev) { - - return 0; + ili9342_panel_disable((struct omap_dss_device *) dev); + return 0; } static int ili9342_disp_resume (struct device * dev) { - - return 0; + ili9342_panel_enable((struct omap_dss_device *) dev); + return 0; } static struct dev_pm_ops ili9342_disp_pm_ops = { |