diff options
| -rw-r--r-- | sound/soc/codecs/wm8985.c | 43 | 
1 files changed, 20 insertions, 23 deletions
diff --git a/sound/soc/codecs/wm8985.c b/sound/soc/codecs/wm8985.c index ab3782657ac..dd6ce3bc01c 100644 --- a/sound/soc/codecs/wm8985.c +++ b/sound/soc/codecs/wm8985.c @@ -830,33 +830,30 @@ static int wm8985_set_pll(struct snd_soc_dai *dai, int pll_id,  	struct pll_div pll_div;  	codec = dai->codec; -	if (freq_in && freq_out) { +	if (!freq_in || !freq_out) { +		/* disable the PLL */ +		snd_soc_update_bits(codec, WM8985_POWER_MANAGEMENT_1, +				    WM8985_PLLEN_MASK, 0); +	} else {  		ret = pll_factors(&pll_div, freq_out * 4 * 2, freq_in);  		if (ret)  			return ret; -	} -	/* disable the PLL before reprogramming it */ -	snd_soc_update_bits(codec, WM8985_POWER_MANAGEMENT_1, -			    WM8985_PLLEN_MASK, 0); -	 -	if (!freq_in || !freq_out) -		return 0; - -	/* set PLLN and PRESCALE */ -	snd_soc_write(codec, WM8985_PLL_N, -		      (pll_div.div2 << WM8985_PLL_PRESCALE_SHIFT) -		      | pll_div.n); -	/* set PLLK */ -	snd_soc_write(codec, WM8985_PLL_K_3, pll_div.k & 0x1ff); -	snd_soc_write(codec, WM8985_PLL_K_2, (pll_div.k >> 9) & 0x1ff); -	snd_soc_write(codec, WM8985_PLL_K_1, (pll_div.k >> 18)); -	/* set the source of the clock to be the PLL */ -	snd_soc_update_bits(codec, WM8985_CLOCK_GEN_CONTROL, -			    WM8985_CLKSEL_MASK, WM8985_CLKSEL); -	/* enable the PLL */ -	snd_soc_update_bits(codec, WM8985_POWER_MANAGEMENT_1, -			    WM8985_PLLEN_MASK, WM8985_PLLEN); +		/* set PLLN and PRESCALE */ +		snd_soc_write(codec, WM8985_PLL_N, +			      (pll_div.div2 << WM8985_PLL_PRESCALE_SHIFT) +			      | pll_div.n); +		/* set PLLK */ +		snd_soc_write(codec, WM8985_PLL_K_3, pll_div.k & 0x1ff); +		snd_soc_write(codec, WM8985_PLL_K_2, (pll_div.k >> 9) & 0x1ff); +		snd_soc_write(codec, WM8985_PLL_K_1, (pll_div.k >> 18)); +		/* set the source of the clock to be the PLL */ +		snd_soc_update_bits(codec, WM8985_CLOCK_GEN_CONTROL, +				    WM8985_CLKSEL_MASK, WM8985_CLKSEL); +		/* enable the PLL */ +		snd_soc_update_bits(codec, WM8985_POWER_MANAGEMENT_1, +				    WM8985_PLLEN_MASK, WM8985_PLLEN); +	}  	return 0;  }  |