diff options
| -rw-r--r-- | arch/arm/mach-omap2/cclock3xxx_data.c | 9 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/clkt34xx_dpll3m2.c | 7 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/pm.c | 7 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/sdram-toshiba-hynix-numonyx.h | 24 |
4 files changed, 26 insertions, 21 deletions
diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c index e823edd05eb..50d8b4587f6 100644 --- a/arch/arm/mach-omap2/cclock3xxx_data.c +++ b/arch/arm/mach-omap2/cclock3xxx_data.c @@ -137,6 +137,10 @@ DEFINE_CLK_DIVIDER(dpll3_m2_ck, "dpll3_ck", &dpll3_ck, 0x0, OMAP3430_CORE_DPLL_CLKOUT_DIV_WIDTH, CLK_DIVIDER_ONE_BASED, NULL); +/* placeholder for ops substitution */ +static struct clk_ops dpll3_m2_ck_subops = { +}; + static struct clk core_ck; static const char *core_ck_parent_names[] = { @@ -3566,6 +3570,11 @@ int __init omap3xxx_clk_init(void) dpll4_m4x2_ck = dpll4_m4x2_ck_3630; dpll4_m5x2_ck = dpll4_m5x2_ck_3630; dpll4_m6x2_ck = dpll4_m6x2_ck_3630; + memcpy( + &dpll3_m2_ck_subops, dpll3_m2_ck.ops, sizeof(struct clk_ops)); + + dpll3_m2_ck_subops.set_rate = omap3_core_dpll_m2_set_rate; + dpll3_m2_ck.ops = &dpll3_m2_ck_subops; } /* diff --git a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c index eb69acf2101..1fc3b607c7d 100644 --- a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c +++ b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c @@ -55,15 +55,16 @@ int omap3_core_dpll_m2_set_rate(struct clk_hw *hw, unsigned long rate, struct omap_sdrc_params *sdrc_cs0; struct omap_sdrc_params *sdrc_cs1; int ret; - unsigned long clkrate; + unsigned long clkrate, flags; if (!clk || !rate) return -EINVAL; - validrate = omap2_clksel_round_rate_div(clk, rate, &new_div); + validrate = clk_round_rate(hw->clk, rate); if (validrate != rate) return -EINVAL; + new_div = parent_rate / validrate; sdrcrate = __clk_get_rate(sdrc_ick_p); clkrate = __clk_get_rate(hw->clk); if (rate > clkrate) @@ -101,6 +102,7 @@ int omap3_core_dpll_m2_set_rate(struct clk_hw *hw, unsigned long rate, sdrc_cs1->rfr_ctrl, sdrc_cs1->actim_ctrla, sdrc_cs1->actim_ctrlb, sdrc_cs1->mr); + local_irq_save(flags); if (sdrc_cs1) omap3_configure_core_dpll( new_div, unlock_dll, c, rate > clkrate, @@ -114,6 +116,7 @@ int omap3_core_dpll_m2_set_rate(struct clk_hw *hw, unsigned long rate, sdrc_cs0->rfr_ctrl, sdrc_cs0->actim_ctrla, sdrc_cs0->actim_ctrlb, sdrc_cs0->mr, 0, 0, 0, 0); + local_irq_restore(flags); return 0; } diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index b06b22c3f64..dd7931c2d54 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -309,13 +309,6 @@ int __init omap2_common_pm_late_init(void) /* Smartreflex device init */ omap_devinit_smartreflex(); - } else { - struct device_node *np; - np = of_find_node_by_name(NULL, "omap_pimic"); - if (np) { - of_platform_populate(np, NULL, NULL, NULL); - of_node_put(np); - } } /* cpufreq dummy device instantiation */ diff --git a/arch/arm/mach-omap2/sdram-toshiba-hynix-numonyx.h b/arch/arm/mach-omap2/sdram-toshiba-hynix-numonyx.h index c7acdb8312d..fe835c96b7d 100644 --- a/arch/arm/mach-omap2/sdram-toshiba-hynix-numonyx.h +++ b/arch/arm/mach-omap2/sdram-toshiba-hynix-numonyx.h @@ -17,43 +17,43 @@ static struct omap_sdrc_params JEDEC_JESD209A_sdrc_params[] = { [0] = { .rate = 200000000, - .actim_ctrla = 0xE2E1B4C6, - .actim_ctrlb = 0x00022228, + .actim_ctrla = 0x7ae1b4c6, + .actim_ctrlb = 0x00021217, .rfr_ctrl = 0x0005E602, .mr = 0x00000032, }, [1] = { .rate = 100000000, - .actim_ctrla = 0x7211B485, - .actim_ctrlb = 0x00022214, + .actim_ctrla = 0x41912286, + .actim_ctrlb = 0x0001110c, .rfr_ctrl = 0x0002DA02, .mr = 0x00000032, }, [2] = { .rate = 166000000, - .actim_ctrla = 0xE2E1B4C6, - .actim_ctrlb = 0x00022228, + .actim_ctrla = 0x6A9DB4C6, + .actim_ctrlb = 0x00021214, .rfr_ctrl = 0x0004DD02, .mr = 0x00000032, }, [3] = { .rate = 83000000, - .actim_ctrla = 0x7215B485, - .actim_ctrlb = 0x00022214, + .actim_ctrla = 0x39512286, + .actim_ctrlb = 0x0001110C, .rfr_ctrl = 0x00025602, .mr = 0x00000032, }, [4] = { .rate = 160000000, - .actim_ctrla = 0xBA9DB4C6, - .actim_ctrlb = 0x00022220, + .actim_ctrla = 0x625DB4C6, + .actim_ctrlb = 0x00021213, .rfr_ctrl = 0x0004AE02, .mr = 0x00000032, }, [5] = { .rate = 80000000, - .actim_ctrla = 0x49512284, - .actim_ctrlb = 0x0001120C, + .actim_ctrla = 0x31512284, + .actim_ctrlb = 0x0001110C, .rfr_ctrl = 0x23E02, .mr = 0x00000032, }, |