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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-02-21 15:27:22 -0800 | 
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-02-21 15:27:22 -0800 | 
| commit | bab588fcfb6335c767d811a8955979f5440328e0 (patch) | |
| tree | 2a862ddf47a82be885a8e7945a17cc3ff7a658b9 /arch/arm/mach-tegra/flowctrl.c | |
| parent | 3298a3511f1e73255a8dc023efd909e569eea037 (diff) | |
| parent | 9cb0d1babfcb1b4ac248c09425f7d5de1e771133 (diff) | |
| download | olio-linux-3.10-bab588fcfb6335c767d811a8955979f5440328e0.tar.xz olio-linux-3.10-bab588fcfb6335c767d811a8955979f5440328e0.zip  | |
Merge tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC-specific updates from Arnd Bergmann:
 "This is a larger set of new functionality for the existing SoC
  families, including:
   - vt8500 gains support for new CPU cores, notably the Cortex-A9 based
     wm8850
   - prima2 gains support for the "marco" SoC family, its SMP based
     cousin
   - tegra gains support for the new Tegra4 (Tegra114) family
   - socfpga now supports a newer version of the hardware including SMP
   - i.mx31 and bcm2835 are now using DT probing for their clocks
   - lots of updates for sh-mobile
   - OMAP updates for clocks, power management and USB
   - i.mx6q and tegra now support cpuidle
   - kirkwood now supports PCIe hot plugging
   - tegra clock support is updated
   - tegra USB PHY probing gets implemented diffently"
* tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (148 commits)
  ARM: prima2: remove duplicate v7_invalidate_l1
  ARM: shmobile: r8a7779: Correct TMU clock support again
  ARM: prima2: fix __init section for cpu hotplug
  ARM: OMAP: Consolidate OMAP USB-HS platform data (part 3/3)
  ARM: OMAP: Consolidate OMAP USB-HS platform data (part 1/3)
  arm: socfpga: Add SMP support for actual socfpga harware
  arm: Add v7_invalidate_l1 to cache-v7.S
  arm: socfpga: Add entries to enable make dtbs socfpga
  arm: socfpga: Add new device tree source for actual socfpga HW
  ARM: tegra: sort Kconfig selects for Tegra114
  ARM: tegra: enable ARCH_REQUIRE_GPIOLIB for Tegra114
  ARM: tegra: Fix build error w/ ARCH_TEGRA_114_SOC w/o ARCH_TEGRA_3x_SOC
  ARM: tegra: Fix build error for gic update
  ARM: tegra: remove empty tegra_smp_init_cpus()
  ARM: shmobile: Register ARM architected timer
  ARM: MARCO: fix the build issue due to gic-vic-to-irqchip move
  ARM: shmobile: r8a7779: Correct TMU clock support
  ARM: mxs_defconfig: Select CONFIG_DEVTMPFS_MOUNT
  ARM: mxs: decrease mxs_clockevent_device.min_delta_ns to 2 clock cycles
  ARM: mxs: use apbx bus clock to drive the timers on timrotv2
  ...
Diffstat (limited to 'arch/arm/mach-tegra/flowctrl.c')
| -rw-r--r-- | arch/arm/mach-tegra/flowctrl.c | 38 | 
1 files changed, 33 insertions, 5 deletions
diff --git a/arch/arm/mach-tegra/flowctrl.c b/arch/arm/mach-tegra/flowctrl.c index 5393eb2cae2..b477ef310dc 100644 --- a/arch/arm/mach-tegra/flowctrl.c +++ b/arch/arm/mach-tegra/flowctrl.c @@ -25,6 +25,7 @@  #include "flowctrl.h"  #include "iomap.h" +#include "fuse.h"  static u8 flowctrl_offset_halt_cpu[] = {  	FLOW_CTRL_HALT_CPU0_EVENTS, @@ -75,11 +76,26 @@ void flowctrl_cpu_suspend_enter(unsigned int cpuid)  	int i;  	reg = flowctrl_read_cpu_csr(cpuid); -	reg &= ~TEGRA30_FLOW_CTRL_CSR_WFE_BITMAP;	/* clear wfe bitmap */ -	reg &= ~TEGRA30_FLOW_CTRL_CSR_WFI_BITMAP;	/* clear wfi bitmap */ +	switch (tegra_chip_id) { +	case TEGRA20: +		/* clear wfe bitmap */ +		reg &= ~TEGRA20_FLOW_CTRL_CSR_WFE_BITMAP; +		/* clear wfi bitmap */ +		reg &= ~TEGRA20_FLOW_CTRL_CSR_WFI_BITMAP; +		/* pwr gating on wfe */ +		reg |= TEGRA20_FLOW_CTRL_CSR_WFE_CPU0 << cpuid; +		break; +	case TEGRA30: +		/* clear wfe bitmap */ +		reg &= ~TEGRA30_FLOW_CTRL_CSR_WFE_BITMAP; +		/* clear wfi bitmap */ +		reg &= ~TEGRA30_FLOW_CTRL_CSR_WFI_BITMAP; +		/* pwr gating on wfi */ +		reg |= TEGRA30_FLOW_CTRL_CSR_WFI_CPU0 << cpuid; +		break; +	}  	reg |= FLOW_CTRL_CSR_INTR_FLAG;			/* clear intr flag */  	reg |= FLOW_CTRL_CSR_EVENT_FLAG;		/* clear event flag */ -	reg |= TEGRA30_FLOW_CTRL_CSR_WFI_CPU0 << cpuid;	/* pwr gating on wfi */  	reg |= FLOW_CTRL_CSR_ENABLE;			/* pwr gating */  	flowctrl_write_cpu_csr(cpuid, reg); @@ -99,8 +115,20 @@ void flowctrl_cpu_suspend_exit(unsigned int cpuid)  	/* Disable powergating via flow controller for CPU0 */  	reg = flowctrl_read_cpu_csr(cpuid); -	reg &= ~TEGRA30_FLOW_CTRL_CSR_WFE_BITMAP;	/* clear wfe bitmap */ -	reg &= ~TEGRA30_FLOW_CTRL_CSR_WFI_BITMAP;	/* clear wfi bitmap */ +	switch (tegra_chip_id) { +	case TEGRA20: +		/* clear wfe bitmap */ +		reg &= ~TEGRA20_FLOW_CTRL_CSR_WFE_BITMAP; +		/* clear wfi bitmap */ +		reg &= ~TEGRA20_FLOW_CTRL_CSR_WFI_BITMAP; +		break; +	case TEGRA30: +		/* clear wfe bitmap */ +		reg &= ~TEGRA30_FLOW_CTRL_CSR_WFE_BITMAP; +		/* clear wfi bitmap */ +		reg &= ~TEGRA30_FLOW_CTRL_CSR_WFI_BITMAP; +		break; +	}  	reg &= ~FLOW_CTRL_CSR_ENABLE;			/* clear enable */  	reg |= FLOW_CTRL_CSR_INTR_FLAG;			/* clear intr */  	reg |= FLOW_CTRL_CSR_EVENT_FLAG;		/* clear event */  |