First steps at making cpufreq scale properly again.

Change-Id: Ibe4a4f1440d1b7dd2de9a285d728834eb0b87e66

5 files changed, 110 insertions, 57 deletions

diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index cae4e9725d0..9973c97bc09 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -208,7 +208,7 @@
 					<&omap3_pmx_core 26 0xd9 1>,
 					<&omap3_pmx_core 28 0xc1 4>;
 		};
-/*
+	/*
 		uart1: serial@4806a000 {
 			compatible = "ti,omap3-uart";
 			ti,hwmods = "uart1";
@@ -225,7 +225,8 @@
 			compatible = "ti,omap3-uart";
 			ti,hwmods = "uart3";
 			clock-frequency = <48000000>;
- }; */
+		};
+	 */
         
 		i2c1: i2c@48070000 {
 			compatible = "ti,omap3-i2c";
diff --git a/arch/arm/boot/dts/omap3_h1.dts b/arch/arm/boot/dts/omap3_h1.dts
index ab2a48631e4..fbf8796599d 100644
--- a/arch/arm/boot/dts/omap3_h1.dts
+++ b/arch/arm/boot/dts/omap3_h1.dts
@@ -24,9 +24,8 @@
 				 300000   975000
 				 600000  1150000
 				 800000  1275000
-       		              /* 1000000 1337500 */
 			>;
-			cpu0-supply = <&omap_tps65910>;
+			cpu0-supply = <&vdd1_reg>;
 			/* OPP tolerance in percentage */
 			voltage-tolerance = <0>;
 			reset-voltage = <1275000>;
@@ -41,6 +40,7 @@
 		regulator-boot-on;
 	};
 
+	/*
 	omap_pimic {
 		omap_tps65910: omap_vdd1 {
 			compatible = "ti,omap-tps65910-vdd1";
@@ -54,7 +54,8 @@
 			ti,vp = <&vp_core>;
 		};
 	};
-    
+        */
+
 	pad-wkup {
 		/* on omap, the irqs are calculated as follows:
 		 * for the 96 intc IRQs
@@ -75,6 +76,7 @@
 		/* listed below will be reported as the wakeup reason */
 		/*                                                    */
 		/*             off  IRQ handle                        */
+
 		ti,pad_irq = <0x150  88  1>, /* 72 + 16, uart1 - BT input      */
                      <0x9f6  143 1>, /* mpu6515 irq pin - is this offset correct?      */
                      <0x9ea  122 1>, /* bq27400 chg irq8 */
@@ -149,13 +151,14 @@
 			0x1a0 0x000	/* MCSPI1_CS1, MODE0 | OUTPUT */
                         
             /* CKE pin for memory */
-            0x232 0x000	/* SDRC_CKE0, MODE0 | OUTPUT */
-            0x234 0x000	/* SDRC_CKE1, MODE0 | OUTPUT */
+	                0x232 0x000	/* SDRC_CKE0, MODE0 | OUTPUT */
+			0x234 0x000	/* SDRC_CKE1, MODE0 | OUTPUT */
 
 			/* touch reset */
 			0x0f2 0x11c	/* CAM_D6, MODE4 | INPUT_PULLUP */
 
-            0x1b0 0xc100	/* SYS_NIRQ, MODE0 | INPUT | OFFWAKEUP */
+			0x5ba 0x004	/* ETK_D7, MODE4 | OUTPUT (from GL susp) */
+			0x1b0 0xc100	/* SYS_NIRQ, MODE0 | INPUT | OFFWAKEUP */
 
 			0x0dc 0x004	/* CAM_HS, MODE4 | OUTPUT */
 
@@ -214,15 +217,28 @@
           >;
     };
 
+	/*
 	i2c1_pins: pinmux_i2c1_pins {
 		pinctrl-single,pins = <
-			0x18a 0x118     /* I2C1_SCL, MODE0 | INPUT_PULLUP */
-			0x18c 0x118     /* I2C1_SCA, MODE0 | INPUT_PULLUP */
+			0x18a 0x118 */    /* I2C1_SCL, MODE0 | INPUT_PULLUP */
+			/* 0x18c 0x118 */ /* I2C1_SCA, MODE0 | INPUT_PULLUP */
+	/*	>;
+	};
+	*/
+
+	i2c1_pins: pinmux_i2c1_pins {
+		pinctrl-single,pins = <
+			0x188 0x118     /* I2C1_SCL, MODE0 | INPUT_PULLUP */
+			0x18c 0x118     /* I2C1_SCL, MODE0 | INPUT_PULLUP */
 		>;
 	};
-    
 
-    
+	i2c2_pins: pinmux_i2c2_pins {
+		pinctrl-single,pins = <
+			0x18e 0x118     /* I2C2_SCL, MODE0 | INPUT_PULLUP */
+			0x190 0x118     /* I2C2_SDA, MODE0 | INPUT_PULLUP */
+		>;
+	};
 };
 
 &omap3_pmx_wkup { /* pinmux@0x48002a00  */
@@ -233,6 +249,7 @@
 		pinctrl-single,pins = <
 			0x006 0x008     /* SYS_CLKREQ, MODE0 | PULLDOWN */
 			0x018 0x000     /* SYS_OFF_MODE, MODE0 */
+
 			/* Fuel gauge interrupt */
 			0x01a 0x4104     /* SYS_CLKOUT1, MODE4 | OMAP_PIN_INPUT */
 
@@ -272,15 +289,22 @@
 	interrupts = <7>;       /* SYS_NIRQ */
 	interrupt-parent = <&intc>;
 
-	#interrupt-cells = <2>;
+#interrupt-cells = <2>;
 	interrupt-controller;
 
+	/* This is from HEAD */
+	/* ti,en-ck32k-xtal; */
+	/* ti,en-dev-slp; */
+	/* ti,sleepsig-pol; */
+	/* ti,clkout32k-keepon; */
+	/* set SR_CTL_I2C_SEL - access to smartreflex registers by control i2c */
+	/* ti,system-power-controller; */
+
+	/* This is from GL's suspend branch */
+	/* crystal oscillator is installed on the board */
 	ti,en-ck32k-xtal;
-	ti,en-dev-slp;
-	ti,sleepsig-pol;
-	ti,clkout32k-keepon;
 	/* set SR_CTL_I2C_SEL - access to smartreflex registers by control i2c */
-	ti,system-power-controller;
+	/* ti,system-power-controller; */
 
 	vcc1-supply = <&vbat>;
 	vcc2-supply = <&vbat>;
@@ -292,88 +316,96 @@
 	vccio-supply = <&vbat>;
 
 	regulators {
-		vrtc_reg: regulator@0 {
+	vrtc_reg: regulator@0 {
 			regulator-always-on;
 			ti,regulator-ext-sleep-control = <8>;
 		};
 
-        /* DSS is on this one */
-		vio_reg: regulator@1 {
-            regulator-name = "vdds_dsi";
+		/* DSS is on this one */
+	vio_reg: regulator@1 {
+			regulator-name = "vdds_dsi";
 			regulator-min-microvolt = <1800000>;
 			regulator-max-microvolt = <1800000>;
 			regulator-always-on;
 		};
 
-      /* Leave one and two on for reliable wake-up */
+		/* Leave one and two on for reliable wake-up */
 
-		vdd1_reg: regulator@2 {
+	vdd1_reg: regulator@2 {
 			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
 			/*
-			regulator-boot-on;
-			regulator-always-on;
+			  regulator-boot-on;
+			  regulator-always-on;
 			*/
 			/* external sleep control by means of SYS_OFF_MODE signal */
-		    regulator-name = "vdd_mpu_iva";	
-            regulator-min-microvolt = <900000>;
+			/* regulator-name = "vdd_mpu_iva"; */
+			regulator-name = "cpu0";
+			regulator-min-microvolt = <900000>;
 			regulator-max-microvolt = <1350000>;
+
 			ti,regulator-ext-sleep-control = <8>;
 		};
 
-		vdd2_reg: regulator@3 {
+	vdd2_reg: regulator@3 {
 			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
 			/*
-			regulator-boot-on;
-			regulator-always-on;
+
+			  regulator-name = "vdd_core";
+			  regulator-min-microvolt = <900000>;
+			  regulator-max-microvolt = <1200000>;
+
+			  regulator-boot-on;
+			  regulator-always-on;
 			*/
 			/* external sleep control by means of SYS_OFF_MODE signal */
+
 			regulator-name = "vdd_core";
 			regulator-min-microvolt = <900000>;
 			regulator-max-microvolt = <1200000>;
 			ti,regulator-ext-sleep-control = <8>;
 		};
 
-      /* not used, I think */
-		vdd3_reg: regulator@4 {
-            status = "disabled";
+		/* not used, I think */
+	vdd3_reg: regulator@4 {
+			status = "disabled";
 			ti,regulator-ext-sleep-control = <8>;
 		};
 
-      /* This is the accelerometer. We always want it on. */
-		vdig1_reg: regulator@5 {
+		/* This is the accelerometer. We always want it on. */
+	vdig1_reg: regulator@5 {
 			regulator-min-microvolt = <1800000>;
 			regulator-max-microvolt = <1800000>;
-            regulator-always-on;
+			regulator-always-on;
 		};
 
 		/* vdig2_reg: regulator@6 {}; unused */
-		vdig2_reg: regulator@6 {
+	vdig2_reg: regulator@6 {
 			status = "disabled";
 			ti,regulator-ext-sleep-control = <8>;
 		};
 
-      /* Nobody is explicitly using this rail, but it seems like it goes to 
-       * VDDA_DPLL_PER on the chip. So we need it.
-       */
-		vpll_reg: regulator@7 {
+		/* Nobody is explicitly using this rail, but it seems like
+		 * it goes to VDDA_DPLL_PER on the chip. So we need it.
+		 */
+	vpll_reg: regulator@7 {
 			regulator-min-microvolt = <1800000>;
 			regulator-max-microvolt = <1800000>;    
 			ti,regulator-ext-sleep-control = <8>;
 		};
 
 		/* vdac_reg: regulator@8 {}; unused */
-		vdac_reg: regulator@8 {
+	vdac_reg: regulator@8 {
 			status = "disabled";
 			ti,regulator-ext-sleep-control = <8>;
 		};
 
-        vaux1_reg: regulator@9 { /* not used, 2.85V by default */
-            status = "disabled";
+	vaux1_reg: regulator@9 { /* not used, 2.85V by default */
+			status = "disabled";
 			ti,regulator-ext-sleep-control = <8>;
 		};
 
-		vaux2_reg: regulator@10 {
-            regulator-name = "vaux2";
+	vaux2_reg: regulator@10 {
+			regulator-name = "vaux2";
 			regulator-min-microvolt = <3300000>;
 			regulator-max-microvolt = <3300000>;
 			regulator-always-on;
@@ -382,25 +414,26 @@
 
       /* This is Bluetooth - never turn it off */
 
-		vaux33_reg: regulator@11 {
-            regulator-name = "vaux33";
+	vaux33_reg: regulator@11 {
+			regulator-name = "vaux33";
 			regulator-min-microvolt = <3300000>;
 			regulator-max-microvolt = <3300000>;
 			regulator-always-on;
 			/* ti,regulator-ext-sleep-control = <8>; */
 		};
 
-      /* This one goes to both SPI (for DSS) and touch. How can I 
-       * specify two consumers in DT? (vdd for dss, avdd for touch). 
-       */
-		vmmc_reg: regulator@12 {
+		/* This one goes to both SPI (for DSS) and touch. How can I
+		 * specify two consumers in DT? (vdd for dss, avdd for touch).
+		 */
+	vmmc_reg: regulator@12 {
+			regulator-name = "vdds_dsi";
 			regulator-min-microvolt = <3300000>;
 			regulator-max-microvolt = <3300000>;
 			regulator-always-on;
 			/*ti,regulator-ext-sleep-control = <8>;*/
 		};
 	};
-};
+ };
 
 
 /* leave gpio bank interface clocks on during suspend
@@ -441,5 +474,3 @@
 &mmc3 {
 	status = "disabled";
 };
-
-
diff --git a/arch/arm/mach-omap2/board-omap3h1.c b/arch/arm/mach-omap2/board-omap3h1.c
index 14a0008d0b9..f032b8e7e3b 100644
--- a/arch/arm/mach-omap2/board-omap3h1.c
+++ b/arch/arm/mach-omap2/board-omap3h1.c
@@ -91,6 +91,7 @@
 #define LCD_RESET_GPIO 122
 #endif
 
+
 #define BACKLIGHT_PWM_GPIO    128
 
 static struct of_device_id omap_dt_match_table[] __initdata = {
@@ -479,6 +480,7 @@ static struct platform_device *omap3h1_devices[] __initdata = {
 
 static void __init omap3_h1_init(void)
 {
+
 	/* Read what we can from the device tree */
 
 	of_platform_populate(NULL, omap_dt_match_table, NULL, NULL);
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index b06b22c3f64..04ccc127e75 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -309,6 +309,7 @@ int __init omap2_common_pm_late_init(void)
 		/* Smartreflex device init */
 		omap_devinit_smartreflex();
 
+#ifdef OLIO_TEST_GL_SUSPEND
 	} else {
 		struct device_node *np;
 		np = of_find_node_by_name(NULL, "omap_pimic");
@@ -316,6 +317,7 @@ int __init omap2_common_pm_late_init(void)
 			of_platform_populate(np, NULL, NULL, NULL);
 			of_node_put(np);
 		}
+#endif /* OLIO_TEST_GL_SUSPEND */
 	}
 
 	/* cpufreq dummy device instantiation */
diff --git a/drivers/mfd/tps65910.c b/drivers/mfd/tps65910.c
index 1e7ef2a2e35..0e0412b3bfb 100644
--- a/drivers/mfd/tps65910.c
+++ b/drivers/mfd/tps65910.c
@@ -363,8 +363,13 @@ static int tps65910_sleepinit(struct tps65910 *tps65910,
 
 	dev = tps65910->dev;
 
-	if (!pmic_pdata->en_dev_slp)
-		return 0;
+	/* set polarity of SLLEEPSIG requst ot enter OFF mode */
+	ret = tps65910_reg_set_bits(tps65910, TPS65910_DEVCTRL2,
+				DEVCTRL2_SLEEPSIG_POL_MASK);
+	if (ret < 0) {
+		dev_err(dev, "set sleepsig_pol failed: %d\n", ret);
+		goto err_sleep_init;
+	}
 
 	/*
 	 * set polarity of SLLEEPSIG requst to enter OFF mode
@@ -385,6 +390,18 @@ static int tps65910_sleepinit(struct tps65910 *tps65910,
 		goto err_sleep_init;
 	}
 
+	ret = tps65910_reg_set_bits(tps65910, TPS65910_SLEEP_KEEP_RES_ON,
+				SLEEP_KEEP_RES_ON_CLKOUT32K_KEEPON_MASK);
+	if (ret < 0) {
+		dev_err(dev, "set sleep_keep_res_on failed: %d\n", ret);
+		goto err_sleep_init;
+	}
+
+/* Return if there is no sleep keepon data. */
+/* This can't really happen... */
+/* if (pmic_pdata.slp_keepon) */
+/* return 0; */
+
 	if (pmic_pdata->slp_keepon.therm_keepon) {
 		ret = tps65910_reg_set_bits(tps65910,
 				TPS65910_SLEEP_KEEP_RES_ON,