diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-06-07 19:09:26 -0700 | 
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-06-07 19:09:26 -0700 | 
| commit | ef2398019b305827ea7130ebaf7bf521b444530e (patch) | |
| tree | c974a5a37d524eb0d9e956a2ae76cd6c6b7fabd0 | |
| parent | 12871a0bd67dd4db4418e1daafcd46e9d329ef10 (diff) | |
| parent | dcc32b838b449aef8533f130cfad41b912bfb228 (diff) | |
| download | olio-linux-3.10-ef2398019b305827ea7130ebaf7bf521b444530e.tar.xz olio-linux-3.10-ef2398019b305827ea7130ebaf7bf521b444530e.zip  | |
Merge branch 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6:
  drm/nv40: fall back to paged dma object for the moment
  drm/nouveau: fix leak of gart mm node
  drm/nouveau: fix vram page mapping when crossing page table boundaries
  drm/nv17-nv40: Fix modesetting failure when pitch == 4096px (fdo bug 35901).
  drm/nouveau: don't create accel engine objects when noaccel=1
  drm/nvc0: recognise 0xdX chipsets as NV_C0
  drm/i915: Add a no lvds quirk for the Asus EeeBox PC EB1007
  drm/i915: Share the common force-audio property between connectors
  drm/i915: Remove unused enum "chip_family"
  drm/915: fix relaxed tiling on gen2: tile height
  drm/i915/crt: Explicitly return false if connected to a digital monitor
  drm/i915: Replace ironlake_compute_wm0 with g4x_compute_wm0
  drm/i915: Only print out the actual number of fences for i915_error_state
  drm/i915: s/addr & ~PAGE_MASK/offset_in_page(addr)/
  drm: i915: correct return status in intel_hdmi_mode_valid()
  drm/i915: fix regression after clock gating init split
  drm/i915: fix if statement in ivybridge irq handler
| -rw-r--r-- | drivers/gpu/drm/i915/i915_debugfs.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 8 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/i915_gem.c | 26 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_crt.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 89 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 15 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_drv.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_hdmi.c | 16 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_lvds.c | 8 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_modes.c | 30 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_sdvo.c | 14 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_hw.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_mem.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_sgdma.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_state.c | 114 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_vm.c | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nv04_crtc.c | 8 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvreg.h | 2 | 
19 files changed, 161 insertions, 187 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 51c2257b11e..4d46441cbe2 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -776,7 +776,7 @@ static int i915_error_state(struct seq_file *m, void *unused)  	seq_printf(m, "  INSTPM: 0x%08x\n", error->instpm);  	seq_printf(m, "  seqno: 0x%08x\n", error->seqno); -	for (i = 0; i < 16; i++) +	for (i = 0; i < dev_priv->num_fence_regs; i++)  		seq_printf(m, "  fence[%d] = %08llx\n", i, error->fence[i]);  	if (error->active_bo) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index ee660355ae6..f63ee162f12 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -716,6 +716,7 @@ typedef struct drm_i915_private {  	struct intel_fbdev *fbdev;  	struct drm_property *broadcast_rgb_property; +	struct drm_property *force_audio_property;  	atomic_t forcewake_count;  } drm_i915_private_t; @@ -909,13 +910,6 @@ struct drm_i915_file_private {  	} mm;  }; -enum intel_chip_family { -	CHIP_I8XX = 0x01, -	CHIP_I9XX = 0x02, -	CHIP_I915 = 0x04, -	CHIP_I965 = 0x08, -}; -  #define INTEL_INFO(dev)	(((struct drm_i915_private *) (dev)->dev_private)->info)  #define IS_I830(dev)		((dev)->pci_device == 0x3577) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 0b2e167d2bc..12d32579b95 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -354,7 +354,7 @@ i915_gem_shmem_pread_fast(struct drm_device *dev,  		 * page_offset = offset within page  		 * page_length = bytes to copy for this page  		 */ -		page_offset = offset & (PAGE_SIZE-1); +		page_offset = offset_in_page(offset);  		page_length = remain;  		if ((page_offset + remain) > PAGE_SIZE)  			page_length = PAGE_SIZE - page_offset; @@ -453,9 +453,9 @@ i915_gem_shmem_pread_slow(struct drm_device *dev,  		 * data_page_offset = offset with data_page_index page.  		 * page_length = bytes to copy for this page  		 */ -		shmem_page_offset = offset & ~PAGE_MASK; +		shmem_page_offset = offset_in_page(offset);  		data_page_index = data_ptr / PAGE_SIZE - first_data_page; -		data_page_offset = data_ptr & ~PAGE_MASK; +		data_page_offset = offset_in_page(data_ptr);  		page_length = remain;  		if ((shmem_page_offset + page_length) > PAGE_SIZE) @@ -638,8 +638,8 @@ i915_gem_gtt_pwrite_fast(struct drm_device *dev,  		 * page_offset = offset within page  		 * page_length = bytes to copy for this page  		 */ -		page_base = (offset & ~(PAGE_SIZE-1)); -		page_offset = offset & (PAGE_SIZE-1); +		page_base = offset & PAGE_MASK; +		page_offset = offset_in_page(offset);  		page_length = remain;  		if ((page_offset + remain) > PAGE_SIZE)  			page_length = PAGE_SIZE - page_offset; @@ -650,7 +650,6 @@ i915_gem_gtt_pwrite_fast(struct drm_device *dev,  		 */  		if (fast_user_write(dev_priv->mm.gtt_mapping, page_base,  				    page_offset, user_data, page_length)) -  			return -EFAULT;  		remain -= page_length; @@ -730,9 +729,9 @@ i915_gem_gtt_pwrite_slow(struct drm_device *dev,  		 * page_length = bytes to copy for this page  		 */  		gtt_page_base = offset & PAGE_MASK; -		gtt_page_offset = offset & ~PAGE_MASK; +		gtt_page_offset = offset_in_page(offset);  		data_page_index = data_ptr / PAGE_SIZE - first_data_page; -		data_page_offset = data_ptr & ~PAGE_MASK; +		data_page_offset = offset_in_page(data_ptr);  		page_length = remain;  		if ((gtt_page_offset + page_length) > PAGE_SIZE) @@ -791,7 +790,7 @@ i915_gem_shmem_pwrite_fast(struct drm_device *dev,  		 * page_offset = offset within page  		 * page_length = bytes to copy for this page  		 */ -		page_offset = offset & (PAGE_SIZE-1); +		page_offset = offset_in_page(offset);  		page_length = remain;  		if ((page_offset + remain) > PAGE_SIZE)  			page_length = PAGE_SIZE - page_offset; @@ -896,9 +895,9 @@ i915_gem_shmem_pwrite_slow(struct drm_device *dev,  		 * data_page_offset = offset with data_page_index page.  		 * page_length = bytes to copy for this page  		 */ -		shmem_page_offset = offset & ~PAGE_MASK; +		shmem_page_offset = offset_in_page(offset);  		data_page_index = data_ptr / PAGE_SIZE - first_data_page; -		data_page_offset = data_ptr & ~PAGE_MASK; +		data_page_offset = offset_in_page(data_ptr);  		page_length = remain;  		if ((shmem_page_offset + page_length) > PAGE_SIZE) @@ -1450,8 +1449,9 @@ i915_gem_get_unfenced_gtt_alignment(struct drm_i915_gem_object *obj)  	 * edge of an even tile row (where tile rows are counted as if the bo is  	 * placed in a fenced gtt region).  	 */ -	if (IS_GEN2(dev) || -	    (obj->tiling_mode == I915_TILING_Y && HAS_128_BYTE_Y_TILING(dev))) +	if (IS_GEN2(dev)) +		tile_height = 16; +	else if (obj->tiling_mode == I915_TILING_Y && HAS_128_BYTE_Y_TILING(dev))  		tile_height = 32;  	else  		tile_height = 8; diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index b79619a7b78..b9fafe3b045 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -517,7 +517,7 @@ irqreturn_t ivybridge_irq_handler(DRM_IRQ_ARGS)  	if (de_iir & DE_PIPEA_VBLANK_IVB)  		drm_handle_vblank(dev, 0); -	if (de_iir & DE_PIPEB_VBLANK_IVB); +	if (de_iir & DE_PIPEB_VBLANK_IVB)  		drm_handle_vblank(dev, 1);  	/* check event from PCH */ diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c index e93f93cc7e7..0979d887788 100644 --- a/drivers/gpu/drm/i915/intel_crt.c +++ b/drivers/gpu/drm/i915/intel_crt.c @@ -288,6 +288,8 @@ static bool intel_crt_detect_ddc(struct drm_connector *connector)  		 * This may be a DVI-I connector with a shared DDC  		 * link between analog and digital outputs, so we  		 * have to check the EDID input spec of the attached device. +		 * +		 * On the other hand, what should we do if it is a broken EDID?  		 */  		if (edid != NULL) {  			is_digital = edid->input & DRM_EDID_INPUT_DIGITAL; @@ -298,6 +300,8 @@ static bool intel_crt_detect_ddc(struct drm_connector *connector)  		if (!is_digital) {  			DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");  			return true; +		} else { +			DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");  		}  	} diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index f553ddfdc16..81a9059b6a9 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3983,54 +3983,6 @@ static void i830_update_wm(struct drm_device *dev)  #define ILK_LP0_PLANE_LATENCY		700  #define ILK_LP0_CURSOR_LATENCY		1300 -static bool ironlake_compute_wm0(struct drm_device *dev, -				 int pipe, -				 const struct intel_watermark_params *display, -				 int display_latency_ns, -				 const struct intel_watermark_params *cursor, -				 int cursor_latency_ns, -				 int *plane_wm, -				 int *cursor_wm) -{ -	struct drm_crtc *crtc; -	int htotal, hdisplay, clock, pixel_size; -	int line_time_us, line_count; -	int entries, tlb_miss; - -	crtc = intel_get_crtc_for_pipe(dev, pipe); -	if (crtc->fb == NULL || !crtc->enabled) -		return false; - -	htotal = crtc->mode.htotal; -	hdisplay = crtc->mode.hdisplay; -	clock = crtc->mode.clock; -	pixel_size = crtc->fb->bits_per_pixel / 8; - -	/* Use the small buffer method to calculate plane watermark */ -	entries = ((clock * pixel_size / 1000) * display_latency_ns) / 1000; -	tlb_miss = display->fifo_size*display->cacheline_size - hdisplay * 8; -	if (tlb_miss > 0) -		entries += tlb_miss; -	entries = DIV_ROUND_UP(entries, display->cacheline_size); -	*plane_wm = entries + display->guard_size; -	if (*plane_wm > (int)display->max_wm) -		*plane_wm = display->max_wm; - -	/* Use the large buffer method to calculate cursor watermark */ -	line_time_us = ((htotal * 1000) / clock); -	line_count = (cursor_latency_ns / line_time_us + 1000) / 1000; -	entries = line_count * 64 * pixel_size; -	tlb_miss = cursor->fifo_size*cursor->cacheline_size - hdisplay * 8; -	if (tlb_miss > 0) -		entries += tlb_miss; -	entries = DIV_ROUND_UP(entries, cursor->cacheline_size); -	*cursor_wm = entries + cursor->guard_size; -	if (*cursor_wm > (int)cursor->max_wm) -		*cursor_wm = (int)cursor->max_wm; - -	return true; -} -  /*   * Check the wm result.   * @@ -4139,12 +4091,12 @@ static void ironlake_update_wm(struct drm_device *dev)  	unsigned int enabled;  	enabled = 0; -	if (ironlake_compute_wm0(dev, 0, -				 &ironlake_display_wm_info, -				 ILK_LP0_PLANE_LATENCY, -				 &ironlake_cursor_wm_info, -				 ILK_LP0_CURSOR_LATENCY, -				 &plane_wm, &cursor_wm)) { +	if (g4x_compute_wm0(dev, 0, +			    &ironlake_display_wm_info, +			    ILK_LP0_PLANE_LATENCY, +			    &ironlake_cursor_wm_info, +			    ILK_LP0_CURSOR_LATENCY, +			    &plane_wm, &cursor_wm)) {  		I915_WRITE(WM0_PIPEA_ILK,  			   (plane_wm << WM0_PIPE_PLANE_SHIFT) | cursor_wm);  		DRM_DEBUG_KMS("FIFO watermarks For pipe A -" @@ -4153,12 +4105,12 @@ static void ironlake_update_wm(struct drm_device *dev)  		enabled |= 1;  	} -	if (ironlake_compute_wm0(dev, 1, -				 &ironlake_display_wm_info, -				 ILK_LP0_PLANE_LATENCY, -				 &ironlake_cursor_wm_info, -				 ILK_LP0_CURSOR_LATENCY, -				 &plane_wm, &cursor_wm)) { +	if (g4x_compute_wm0(dev, 1, +			    &ironlake_display_wm_info, +			    ILK_LP0_PLANE_LATENCY, +			    &ironlake_cursor_wm_info, +			    ILK_LP0_CURSOR_LATENCY, +			    &plane_wm, &cursor_wm)) {  		I915_WRITE(WM0_PIPEB_ILK,  			   (plane_wm << WM0_PIPE_PLANE_SHIFT) | cursor_wm);  		DRM_DEBUG_KMS("FIFO watermarks For pipe B -" @@ -4223,10 +4175,10 @@ static void sandybridge_update_wm(struct drm_device *dev)  	unsigned int enabled;  	enabled = 0; -	if (ironlake_compute_wm0(dev, 0, -				 &sandybridge_display_wm_info, latency, -				 &sandybridge_cursor_wm_info, latency, -				 &plane_wm, &cursor_wm)) { +	if (g4x_compute_wm0(dev, 0, +			    &sandybridge_display_wm_info, latency, +			    &sandybridge_cursor_wm_info, latency, +			    &plane_wm, &cursor_wm)) {  		I915_WRITE(WM0_PIPEA_ILK,  			   (plane_wm << WM0_PIPE_PLANE_SHIFT) | cursor_wm);  		DRM_DEBUG_KMS("FIFO watermarks For pipe A -" @@ -4235,10 +4187,10 @@ static void sandybridge_update_wm(struct drm_device *dev)  		enabled |= 1;  	} -	if (ironlake_compute_wm0(dev, 1, -				 &sandybridge_display_wm_info, latency, -				 &sandybridge_cursor_wm_info, latency, -				 &plane_wm, &cursor_wm)) { +	if (g4x_compute_wm0(dev, 1, +			    &sandybridge_display_wm_info, latency, +			    &sandybridge_cursor_wm_info, latency, +			    &plane_wm, &cursor_wm)) {  		I915_WRITE(WM0_PIPEB_ILK,  			   (plane_wm << WM0_PIPE_PLANE_SHIFT) | cursor_wm);  		DRM_DEBUG_KMS("FIFO watermarks For pipe B -" @@ -7675,6 +7627,7 @@ static void intel_init_display(struct drm_device *dev)  			dev_priv->display.update_wm = NULL;  		} else  			dev_priv->display.update_wm = pineview_update_wm; +		dev_priv->display.init_clock_gating = gen3_init_clock_gating;  	} else if (IS_G4X(dev)) {  		dev_priv->display.update_wm = g4x_update_wm;  		dev_priv->display.init_clock_gating = g4x_init_clock_gating; diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index a4d80314e7f..391b55f1cc7 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -59,8 +59,6 @@ struct intel_dp {  	bool is_pch_edp;  	uint8_t	train_set[4];  	uint8_t link_status[DP_LINK_STATUS_SIZE]; - -	struct drm_property *force_audio_property;  };  /** @@ -1702,7 +1700,7 @@ intel_dp_set_property(struct drm_connector *connector,  	if (ret)  		return ret; -	if (property == intel_dp->force_audio_property) { +	if (property == dev_priv->force_audio_property) {  		int i = val;  		bool has_audio; @@ -1841,16 +1839,7 @@ bool intel_dpd_is_edp(struct drm_device *dev)  static void  intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connector)  { -	struct drm_device *dev = connector->dev; - -	intel_dp->force_audio_property = -		drm_property_create(dev, DRM_MODE_PROP_RANGE, "force_audio", 2); -	if (intel_dp->force_audio_property) { -		intel_dp->force_audio_property->values[0] = -1; -		intel_dp->force_audio_property->values[1] = 1; -		drm_connector_attach_property(connector, intel_dp->force_audio_property, 0); -	} - +	intel_attach_force_audio_property(connector);  	intel_attach_broadcast_rgb_property(connector);  } diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 831d7a4a0d1..9ffa61eb4d7 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -236,6 +236,7 @@ struct intel_unpin_work {  int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter);  extern bool intel_ddc_probe(struct intel_encoder *intel_encoder, int ddc_bus); +extern void intel_attach_force_audio_property(struct drm_connector *connector);  extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector);  extern void intel_crt_init(struct drm_device *dev); diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index f289b864297..aa0a8e83142 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -45,7 +45,6 @@ struct intel_hdmi {  	bool has_hdmi_sink;  	bool has_audio;  	int force_audio; -	struct drm_property *force_audio_property;  };  static struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder) @@ -194,7 +193,7 @@ static int intel_hdmi_mode_valid(struct drm_connector *connector,  	if (mode->clock > 165000)  		return MODE_CLOCK_HIGH;  	if (mode->clock < 20000) -		return MODE_CLOCK_HIGH; +		return MODE_CLOCK_LOW;  	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)  		return MODE_NO_DBLESCAN; @@ -287,7 +286,7 @@ intel_hdmi_set_property(struct drm_connector *connector,  	if (ret)  		return ret; -	if (property == intel_hdmi->force_audio_property) { +	if (property == dev_priv->force_audio_property) {  		int i = val;  		bool has_audio; @@ -365,16 +364,7 @@ static const struct drm_encoder_funcs intel_hdmi_enc_funcs = {  static void  intel_hdmi_add_properties(struct intel_hdmi *intel_hdmi, struct drm_connector *connector)  { -	struct drm_device *dev = connector->dev; - -	intel_hdmi->force_audio_property = -		drm_property_create(dev, DRM_MODE_PROP_RANGE, "force_audio", 2); -	if (intel_hdmi->force_audio_property) { -		intel_hdmi->force_audio_property->values[0] = -1; -		intel_hdmi->force_audio_property->values[1] = 1; -		drm_connector_attach_property(connector, intel_hdmi->force_audio_property, 0); -	} - +	intel_attach_force_audio_property(connector);  	intel_attach_broadcast_rgb_property(connector);  } diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index 67cb076d271..b28f7bd9f88 100644 --- a/drivers/gpu/drm/i915/intel_lvds.c +++ b/drivers/gpu/drm/i915/intel_lvds.c @@ -727,6 +727,14 @@ static const struct dmi_system_id intel_no_lvds[] = {  			DMI_MATCH(DMI_PRODUCT_NAME, "U800"),  		},  	}, +	{ +		.callback = intel_no_lvds_dmi_callback, +		.ident = "Asus EeeBox PC EB1007", +		.matches = { +			DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."), +			DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"), +		}, +	},  	{ }	/* terminating entry */  }; diff --git a/drivers/gpu/drm/i915/intel_modes.c b/drivers/gpu/drm/i915/intel_modes.c index 9034dd8f33c..3b26a3ba02d 100644 --- a/drivers/gpu/drm/i915/intel_modes.c +++ b/drivers/gpu/drm/i915/intel_modes.c @@ -81,6 +81,36 @@ int intel_ddc_get_modes(struct drm_connector *connector,  	return ret;  } +static const char *force_audio_names[] = { +	"off", +	"auto", +	"on", +}; + +void +intel_attach_force_audio_property(struct drm_connector *connector) +{ +	struct drm_device *dev = connector->dev; +	struct drm_i915_private *dev_priv = dev->dev_private; +	struct drm_property *prop; +	int i; + +	prop = dev_priv->force_audio_property; +	if (prop == NULL) { +		prop = drm_property_create(dev, DRM_MODE_PROP_ENUM, +					   "audio", +					   ARRAY_SIZE(force_audio_names)); +		if (prop == NULL) +			return; + +		for (i = 0; i < ARRAY_SIZE(force_audio_names); i++) +			drm_property_add_enum(prop, i, i-1, force_audio_names[i]); + +		dev_priv->force_audio_property = prop; +	} +	drm_connector_attach_property(connector, prop, 0); +} +  static const char *broadcast_rgb_names[] = {  	"Full",  	"Limited 16:235", diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c index 754086f8394..30fe554d893 100644 --- a/drivers/gpu/drm/i915/intel_sdvo.c +++ b/drivers/gpu/drm/i915/intel_sdvo.c @@ -148,8 +148,6 @@ struct intel_sdvo_connector {  	int   format_supported_num;  	struct drm_property *tv_format; -	struct drm_property *force_audio_property; -  	/* add the property for the SDVO-TV */  	struct drm_property *left;  	struct drm_property *right; @@ -1712,7 +1710,7 @@ intel_sdvo_set_property(struct drm_connector *connector,  	if (ret)  		return ret; -	if (property == intel_sdvo_connector->force_audio_property) { +	if (property == dev_priv->force_audio_property) {  		int i = val;  		bool has_audio; @@ -2037,15 +2035,7 @@ intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)  {  	struct drm_device *dev = connector->base.base.dev; -	connector->force_audio_property = -		drm_property_create(dev, DRM_MODE_PROP_RANGE, "force_audio", 2); -	if (connector->force_audio_property) { -		connector->force_audio_property->values[0] = -1; -		connector->force_audio_property->values[1] = 1; -		drm_connector_attach_property(&connector->base.base, -					      connector->force_audio_property, 0); -	} - +	intel_attach_force_audio_property(&connector->base.base);  	if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))  		intel_attach_broadcast_rgb_property(&connector->base.base);  } diff --git a/drivers/gpu/drm/nouveau/nouveau_hw.c b/drivers/gpu/drm/nouveau/nouveau_hw.c index 053edf9d2f6..ba896e54b79 100644 --- a/drivers/gpu/drm/nouveau/nouveau_hw.c +++ b/drivers/gpu/drm/nouveau/nouveau_hw.c @@ -900,6 +900,7 @@ nv_save_state_ext(struct drm_device *dev, int head,  	}  	/* NV11 and NV20 don't have this, they stop at 0x52. */  	if (nv_gf4_disp_arch(dev)) { +		rd_cio_state(dev, head, regp, NV_CIO_CRE_42);  		rd_cio_state(dev, head, regp, NV_CIO_CRE_53);  		rd_cio_state(dev, head, regp, NV_CIO_CRE_54); @@ -1003,6 +1004,7 @@ nv_load_state_ext(struct drm_device *dev, int head,  			nouveau_wait_eq(dev, 650000000, NV_PRMCIO_INP0__COLOR, 0x8, 0x0);  		} +		wr_cio_state(dev, head, regp, NV_CIO_CRE_42);  		wr_cio_state(dev, head, regp, NV_CIO_CRE_53);  		wr_cio_state(dev, head, regp, NV_CIO_CRE_54); diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c index 2960f583dc3..5ee14d216ce 100644 --- a/drivers/gpu/drm/nouveau/nouveau_mem.c +++ b/drivers/gpu/drm/nouveau/nouveau_mem.c @@ -397,7 +397,7 @@ nouveau_mem_vram_init(struct drm_device *dev)  		if (pci_dma_supported(dev->pdev, DMA_BIT_MASK(40)))  			dma_bits = 40;  	} else -	if (drm_pci_device_is_pcie(dev) && +	if (0 && drm_pci_device_is_pcie(dev) &&  	    dev_priv->chipset  > 0x40 &&  	    dev_priv->chipset != 0x45) {  		if (pci_dma_supported(dev->pdev, DMA_BIT_MASK(39))) @@ -868,7 +868,9 @@ nouveau_gart_manager_del(struct ttm_mem_type_manager *man,  		nouveau_vm_unmap(&node->tmp_vma);  		nouveau_vm_put(&node->tmp_vma);  	} +  	mem->mm_node = NULL; +	kfree(node);  }  static int diff --git a/drivers/gpu/drm/nouveau/nouveau_sgdma.c b/drivers/gpu/drm/nouveau/nouveau_sgdma.c index c77111eca6a..82fad914e64 100644 --- a/drivers/gpu/drm/nouveau/nouveau_sgdma.c +++ b/drivers/gpu/drm/nouveau/nouveau_sgdma.c @@ -458,7 +458,7 @@ nouveau_sgdma_init(struct drm_device *dev)  		dev_priv->gart_info.type = NOUVEAU_GART_HW;  		dev_priv->gart_info.func = &nv50_sgdma_backend;  	} else -	if (drm_pci_device_is_pcie(dev) && +	if (0 && drm_pci_device_is_pcie(dev) &&  	    dev_priv->chipset > 0x40 && dev_priv->chipset != 0x45) {  		if (nv44_graph_class(dev)) {  			dev_priv->gart_info.func = &nv44_sgdma_backend; diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c index 38ea662568c..80218887e0a 100644 --- a/drivers/gpu/drm/nouveau/nouveau_state.c +++ b/drivers/gpu/drm/nouveau/nouveau_state.c @@ -371,6 +371,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)  		engine->vram.flags_valid	= nv50_vram_flags_valid;  		break;  	case 0xC0: +	case 0xD0:  		engine->instmem.init		= nvc0_instmem_init;  		engine->instmem.takedown	= nvc0_instmem_takedown;  		engine->instmem.suspend		= nvc0_instmem_suspend; @@ -563,68 +564,68 @@ nouveau_card_init(struct drm_device *dev)  	if (ret)  		goto out_timer; -	switch (dev_priv->card_type) { -	case NV_04: -		nv04_graph_create(dev); -		break; -	case NV_10: -		nv10_graph_create(dev); -		break; -	case NV_20: -	case NV_30: -		nv20_graph_create(dev); -		break; -	case NV_40: -		nv40_graph_create(dev); -		break; -	case NV_50: -		nv50_graph_create(dev); -		break; -	case NV_C0: -		nvc0_graph_create(dev); -		break; -	default: -		break; -	} - -	switch (dev_priv->chipset) { -	case 0x84: -	case 0x86: -	case 0x92: -	case 0x94: -	case 0x96: -	case 0xa0: -		nv84_crypt_create(dev); -		break; -	} +	if (!nouveau_noaccel) { +		switch (dev_priv->card_type) { +		case NV_04: +			nv04_graph_create(dev); +			break; +		case NV_10: +			nv10_graph_create(dev); +			break; +		case NV_20: +		case NV_30: +			nv20_graph_create(dev); +			break; +		case NV_40: +			nv40_graph_create(dev); +			break; +		case NV_50: +			nv50_graph_create(dev); +			break; +		case NV_C0: +			nvc0_graph_create(dev); +			break; +		default: +			break; +		} -	switch (dev_priv->card_type) { -	case NV_50:  		switch (dev_priv->chipset) { -		case 0xa3: -		case 0xa5: -		case 0xa8: -		case 0xaf: -			nva3_copy_create(dev); +		case 0x84: +		case 0x86: +		case 0x92: +		case 0x94: +		case 0x96: +		case 0xa0: +			nv84_crypt_create(dev);  			break;  		} -		break; -	case NV_C0: -		nvc0_copy_create(dev, 0); -		nvc0_copy_create(dev, 1); -		break; -	default: -		break; -	} -	if (dev_priv->card_type == NV_40) -		nv40_mpeg_create(dev); -	else -	if (dev_priv->card_type == NV_50 && -	    (dev_priv->chipset < 0x98 || dev_priv->chipset == 0xa0)) -		nv50_mpeg_create(dev); +		switch (dev_priv->card_type) { +		case NV_50: +			switch (dev_priv->chipset) { +			case 0xa3: +			case 0xa5: +			case 0xa8: +			case 0xaf: +				nva3_copy_create(dev); +				break; +			} +			break; +		case NV_C0: +			nvc0_copy_create(dev, 0); +			nvc0_copy_create(dev, 1); +			break; +		default: +			break; +		} + +		if (dev_priv->card_type == NV_40) +			nv40_mpeg_create(dev); +		else +		if (dev_priv->card_type == NV_50 && +		    (dev_priv->chipset < 0x98 || dev_priv->chipset == 0xa0)) +			nv50_mpeg_create(dev); -	if (!nouveau_noaccel) {  		for (e = 0; e < NVOBJ_ENGINE_NR; e++) {  			if (dev_priv->eng[e]) {  				ret = dev_priv->eng[e]->init(dev, e); @@ -922,6 +923,7 @@ int nouveau_load(struct drm_device *dev, unsigned long flags)  		dev_priv->card_type = NV_50;  		break;  	case 0xc0: +	case 0xd0:  		dev_priv->card_type = NV_C0;  		break;  	default: diff --git a/drivers/gpu/drm/nouveau/nouveau_vm.c b/drivers/gpu/drm/nouveau/nouveau_vm.c index 0059e6f58a8..519a6b4bba4 100644 --- a/drivers/gpu/drm/nouveau/nouveau_vm.c +++ b/drivers/gpu/drm/nouveau/nouveau_vm.c @@ -58,6 +58,7 @@ nouveau_vm_map_at(struct nouveau_vma *vma, u64 delta, struct nouveau_mem *node)  			num -= len;  			pte += len;  			if (unlikely(end >= max)) { +				phys += len << (bits + 12);  				pde++;  				pte = 0;  			} diff --git a/drivers/gpu/drm/nouveau/nv04_crtc.c b/drivers/gpu/drm/nouveau/nv04_crtc.c index 3c78bc81357..f1a3ae49199 100644 --- a/drivers/gpu/drm/nouveau/nv04_crtc.c +++ b/drivers/gpu/drm/nouveau/nv04_crtc.c @@ -376,7 +376,10 @@ nv_crtc_mode_set_vga(struct drm_crtc *crtc, struct drm_display_mode *mode)  	 */  	/* framebuffer can be larger than crtc scanout area. */ -	regp->CRTC[NV_CIO_CRE_RPC0_INDEX] = XLATE(fb->pitch / 8, 8, NV_CIO_CRE_RPC0_OFFSET_10_8); +	regp->CRTC[NV_CIO_CRE_RPC0_INDEX] = +		XLATE(fb->pitch / 8, 8, NV_CIO_CRE_RPC0_OFFSET_10_8); +	regp->CRTC[NV_CIO_CRE_42] = +		XLATE(fb->pitch / 8, 11, NV_CIO_CRE_42_OFFSET_11);  	regp->CRTC[NV_CIO_CRE_RPC1_INDEX] = mode->crtc_hdisplay < 1280 ?  					    MASK(NV_CIO_CRE_RPC1_LARGE) : 0x00;  	regp->CRTC[NV_CIO_CRE_LSR_INDEX] = XLATE(horizBlankEnd, 6, NV_CIO_CRE_LSR_HBE_6) | @@ -824,8 +827,11 @@ nv04_crtc_do_mode_set_base(struct drm_crtc *crtc,  	regp->CRTC[NV_CIO_CR_OFFSET_INDEX] = drm_fb->pitch >> 3;  	regp->CRTC[NV_CIO_CRE_RPC0_INDEX] =  		XLATE(drm_fb->pitch >> 3, 8, NV_CIO_CRE_RPC0_OFFSET_10_8); +	regp->CRTC[NV_CIO_CRE_42] = +		XLATE(drm_fb->pitch / 8, 11, NV_CIO_CRE_42_OFFSET_11);  	crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_RPC0_INDEX);  	crtc_wr_cio_state(crtc, regp, NV_CIO_CR_OFFSET_INDEX); +	crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_42);  	/* Update the framebuffer location. */  	regp->fb_start = nv_crtc->fb.offset & ~3; diff --git a/drivers/gpu/drm/nouveau/nvreg.h b/drivers/gpu/drm/nouveau/nvreg.h index fe0f253089a..bbfb1a68fb1 100644 --- a/drivers/gpu/drm/nouveau/nvreg.h +++ b/drivers/gpu/drm/nouveau/nvreg.h @@ -277,6 +277,8 @@  #		define NV_CIO_CRE_EBR_VDE_11		2:2  #		define NV_CIO_CRE_EBR_VRS_11		4:4  #		define NV_CIO_CRE_EBR_VBS_11		6:6 +#	define NV_CIO_CRE_42			0x42 +#		define NV_CIO_CRE_42_OFFSET_11		6:6  #	define NV_CIO_CRE_43			0x43  #	define NV_CIO_CRE_44			0x44	/* head control */  #	define NV_CIO_CRE_CSB			0x45	/* colour saturation boost */  |