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authorRoger Quadros <rogerq@ti.com>2014-08-25 16:15:33 -0700
committerEvan Wilson <evan@oliodevices.com>2014-11-29 14:52:30 -0800
commitbe86804cd2dd68ba8bb99995e5930c9ddd860004 (patch)
tree17f86de559f613380d92e86e4c262145d236cdf6
parentc72f4bdebc9a6aeb30fd36ff33dd31025fd38206 (diff)
downloadolio-linux-3.10-be86804cd2dd68ba8bb99995e5930c9ddd860004.tar.xz
olio-linux-3.10-be86804cd2dd68ba8bb99995e5930c9ddd860004.zip
mtd: nand: omap: Fix 1-bit Hamming code scheme, omap_calculate_ecc()
commit 40ddbf5069bd4e11447c0088fc75318e0aac53f0 upstream. commit 65b97cf6b8de introduced in v3.7 caused a regression by using a reversed CS_MASK thus causing omap_calculate_ecc to always fail. As the NAND base driver never checks for .calculate()'s return value, the zeroed ECC values are used as is without showing any error to the user. However, this won't work and the NAND device won't be guarded by any error code. Fix the issue by using the correct mask. Code was tested on omap3beagle using the following procedure - flash the primary bootloader (MLO) from the kernel to the first NAND partition using nandwrite. - boot the board from NAND. This utilizes OMAP ROM loader that relies on 1-bit Hamming code ECC. Fixes: 65b97cf6b8de (mtd: nand: omap2: handle nand on gpmc) Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/mtd/nand/omap2.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 6f55d92dc23..64d8e32b6ca 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -933,7 +933,7 @@ static int omap_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
u32 val;
val = readl(info->reg.gpmc_ecc_config);
- if (((val >> ECC_CONFIG_CS_SHIFT) & ~CS_MASK) != info->gpmc_cs)
+ if (((val >> ECC_CONFIG_CS_SHIFT) & CS_MASK) != info->gpmc_cs)
return -EINVAL;
/* read ecc result */