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| author | Mohsan Habibi <mohsan@motorola.com> | 2014-08-01 19:39:20 -0400 | 
|---|---|---|
| committer | Mohsan Habibi <mohsan@motorola.com> | 2014-09-04 19:32:52 +0000 | 
| commit | 2c2074ce7ee8f90b7eae5f73094f5ab5d3a5e06e (patch) | |
| tree | 0cd9a665d55e8a13f25426f687f9079d20c4448b | |
| parent | d4ae2fe7494a64ef1324165cb98609c51cba2d3a (diff) | |
| download | olio-linux-3.10-2c2074ce7ee8f90b7eae5f73094f5ab5d3a5e06e.tar.xz olio-linux-3.10-2c2074ce7ee8f90b7eae5f73094f5ab5d3a5e06e.zip  | |
IKXCLOCK-3184 arm: omap3: use dt reserve for secure ram
Since the OMAP smc #1 (secure memory interface call #1) isn't able
to handle memory located in CS1 properly, convert the allocation of
this space to use device tree reserve instead, so we can specify
the exact phsyical address to make sure it gets allocated in CS0
memory.
Change-Id: I3c1619594ec007cb1960f8845dc55c6e57b2537d
Signed-off-by: Mohsan Habibi <mohsan@motorola.com>
| -rw-r--r-- | arch/arm/boot/dts/omap3-minnow.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/control.c | 4 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/omap-secure.c | 5 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/omap-secure.h | 1 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/pm.h | 2 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/pm34xx.c | 10 | 
6 files changed, 11 insertions, 13 deletions
diff --git a/arch/arm/boot/dts/omap3-minnow.dtsi b/arch/arm/boot/dts/omap3-minnow.dtsi index aaadebb253b..173f7f3f5f8 100644 --- a/arch/arm/boot/dts/omap3-minnow.dtsi +++ b/arch/arm/boot/dts/omap3-minnow.dtsi @@ -7,6 +7,8 @@   */  /* reserve memory for ram_console */  /memreserve/ 0x83000000 0x20000; /* IMAGE_DOWN_LOAD_ADDR */ +/memreserve/ 0x83020000 0x16000; /* OMAP_SECURE_RAM_STORAGE_ADDR */ +/memreserve/ 0x83036000 0x9000;  /* OMAP3_SECURE_RAM_CTX_ADDR */  /include/ "omap36xx.dtsi" diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index ab5ec4b28ab..a7da7ccd1a1 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c @@ -92,7 +92,7 @@ struct omap3_scratchpad_sdrc_block {  	u32 block_size;  }; -void *omap3_secure_ram_storage; +phys_addr_t omap3_secure_ram_context;  /*   * This is used to store ARM registers in SDRAM before attempting @@ -360,7 +360,7 @@ void omap3_save_scratchpad_contents(void)  		scratchpad_contents.secure_ram_restore_ptr = 0x0;  	else  		scratchpad_contents.secure_ram_restore_ptr = -			(u32) __pa(omap3_secure_ram_storage); +			(u32) omap3_secure_ram_context;  	scratchpad_contents.sdrc_module_semaphore = 0x0;  	scratchpad_contents.prcm_block_offset = 0x2C;  	scratchpad_contents.sdrc_block_offset = 0x64; diff --git a/arch/arm/mach-omap2/omap-secure.c b/arch/arm/mach-omap2/omap-secure.c index b970440cffc..55b24c32099 100644 --- a/arch/arm/mach-omap2/omap-secure.c +++ b/arch/arm/mach-omap2/omap-secure.c @@ -58,10 +58,7 @@ u32 omap_secure_dispatcher(u32 idx, u32 flag, u32 nargs, u32 arg1, u32 arg2,  /* Allocate the memory to save secure ram */  int __init omap_secure_ram_reserve_memblock(void)  { -	u32 size = OMAP_SECURE_RAM_STORAGE; - -	size = ALIGN(size, SECTION_SIZE); -	omap_secure_memblock_base = arm_memblock_steal(size, SECTION_SIZE); +	omap_secure_memblock_base = OMAP_SECURE_RAM_STORAGE_ADDR;  	return 0;  } diff --git a/arch/arm/mach-omap2/omap-secure.h b/arch/arm/mach-omap2/omap-secure.h index 0e729170c46..dd894db8599 100644 --- a/arch/arm/mach-omap2/omap-secure.h +++ b/arch/arm/mach-omap2/omap-secure.h @@ -28,6 +28,7 @@  /* Maximum Secure memory storage size */  #define OMAP_SECURE_RAM_STORAGE	(88 * SZ_1K) +#define OMAP_SECURE_RAM_STORAGE_ADDR	0x83020000  /* Secure low power HAL API index */  #define OMAP4_HAL_SAVESECURERAM_INDEX	0x1a diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index 4f6f52b5215..551db0bb4a6 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h @@ -30,7 +30,7 @@ static inline int omap4_idle_init(void)  }  #endif -extern void *omap3_secure_ram_storage; +extern phys_addr_t omap3_secure_ram_context;  extern void omap3_pm_off_mode_enable(int);  extern void omap_sram_idle(bool in_suspend);  extern int omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused); diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 6f67bfa0b03..541694bd074 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -59,6 +59,8 @@  #include "pad_wkup.h" +#define OMAP3_SECURE_RAM_CTX_ADDR	0x83036000 +  /* pm34xx errata defined in pm.h */  u16 pm34xx_errata;  bool suspend_debug; @@ -133,8 +135,7 @@ static void omap3_save_secure_ram_context(void)  		 * will hang the system.  		 */  		pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON); -		ret = _omap_save_secure_sram((u32 *) -				__pa(omap3_secure_ram_storage)); +		ret = _omap_save_secure_sram((u32 *)omap3_secure_ram_context);  		pwrdm_set_next_pwrst(mpu_pwrdm, mpu_next_state);  		/* Following is for error tracking, it should not happen */  		if (ret) { @@ -855,10 +856,7 @@ int __init omap3_pm_init(void)  	clkdm_add_wkdep(neon_clkdm, mpu_clkdm);  	if (omap_type() != OMAP2_DEVICE_TYPE_GP) { -		omap3_secure_ram_storage = -			kmalloc(0x803F, GFP_KERNEL); -		if (!omap3_secure_ram_storage) -			pr_err("Memory allocation failed when allocating for secure sram context\n"); +		omap3_secure_ram_context = OMAP3_SECURE_RAM_CTX_ADDR;  		local_irq_disable();  |